[12gevmoller_sim] [EXTERNAL] [JeffersonLab/remoll] 622c03: fix out file and logic

[cipriangal]

  Branch: refs/heads/feature-target-shield-design
  Home:   https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_JeffersonLab_remoll&d=DwICaQ&c=CJqEzB1piLOyyvZjb8YUQw&r=-0uahHXTLsQsllHBZNHgOynLaY6DUxqehsUJ91-BlNY&m=MXCGytxsUF4sdxTOZX_zgpeAjWlBXnIgdxSkTQoTZy8&s=Zbzg_zqr-fTKKgjRhIKS7DIjTMQjDIPsm0kMhbLxxuc&e= 
  Commit: 622c03a7a28b15b781a951d0cd2c5d2f9c331191
      https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_JeffersonLab_remoll_commit_622c03a7a28b15b781a951d0cd2c5d2f9c331191&d=DwICaQ&c=CJqEzB1piLOyyvZjb8YUQw&r=-0uahHXTLsQsllHBZNHgOynLaY6DUxqehsUJ91-BlNY&m=MXCGytxsUF4sdxTOZX_zgpeAjWlBXnIgdxSkTQoTZy8&s=eBMdLa0B39Vg0dJrvqkWI54uhsIUriY4Ub_5LmBRM-o&e= 
  Author: Ciprian Gal <ciprian at jlab.org>
  Date:   2021-02-17 (Wed, 17 Feb 2021)

  Changed paths:
    M analysis/beamLineDetHistos.h
    M analysis/tgtDSana.C

  Log Message:
  -----------
  fix out file and logic