[Clas12_verystrange] FYI: CLAS12 trigger bits
Yuri Gotra
gotra at jlab.org
Thu Apr 12 10:03:22 EDT 2018
Here are the trigger bits. Thresholds and details are in the attached
file we download to coda (latest version, v12).
Also a sample code:
RUN::config.trigger:
boolean[] trigger_bits;
trigger_bits = new boolean[32]; for(int
i=1;i<32;i++)trigger_bits[i]=false;
if(event.hasBank("RUN::config")){
DataBank bank = event.getBank("RUN::config");
TriggerWord = bank.getLong("trigger",0);
String TriggerString = Long.toBinaryString(TriggerWord);
for (int i = 31; i >= 0; i--) trigger_bits[i] =
(TriggerWord & (1 << i)) != 0; }
trigger_bits[1] to trigger_bits[6] correspond to electron respectively
trigger bin in sector 1 to 6
trigger_bits[19] to trigger_bits[21] correspond torespectively opposite
sectors trigger 1/4 , 2/5, and 3/6
trigger_bits[31] corresponds to random trigger bit
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://mailman.jlab.org/pipermail/clas12_verystrange/attachments/20180412/f78e21b0/attachment-0002.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: clonpc13_20180412_074234.gif
Type: image/gif
Size: 47653 bytes
Desc: not available
URL: <https://mailman.jlab.org/pipermail/clas12_verystrange/attachments/20180412/f78e21b0/attachment-0002.gif>
-------------- next part --------------
#########################################
# CLAS12 daq/trigger default config file #
##########################################
##############################
# TI settings (TI master only)
##############################
###################################
# FADC settings (detector-related)
###################################
# Common settings
FADC250_CRATE all
FADC250_SLOT all
FADC250_MODE 1
FADC250_NSB 12
FADC250_NSA 156
FADC250_NPEAK 1
FADC250_DAC 3300
FADC250_TET 20
##FADC250_W_OFFSET 7900
FADC250_W_OFFSET 7650
FADC250_W_WIDTH 400
FADC250_CRATE end
TDC1190_CRATE all
TDC1190_SLOT all
TDC1190_W_WIDTH 800
TDC1190_W_OFFSET -8450
TDC1190_CRATE end
TDC1190_CRATE tdcctof1
TDC1190_SLOT all
TDC1190_W_WIDTH 800
TDC1190_W_OFFSET -8250
TDC1190_CRATE end
TDC1190_CRATE adccnd1
TDC1190_SLOT all
TDC1190_W_WIDTH 800
TDC1190_W_OFFSET -8200
TDC1190_CRATE end
VSCM_CRATE all
VSCM_SLOT all
##VSCM_TRIG_WINDOW 96 1064 16
##VSCM_TRIG_WINDOW 96 1032 16
##VSCM_TRIG_WINDOW 96 968 16
##VSCM_TRIG_WINDOW 80 976 16
#VSCM_TRIG_WINDOW 80 980 16
#VSCM_TRIG_WINDOW 80 978 16
#VSCM_TRIG_WINDOW 80 979 16
VSCM_TRIG_WINDOW 64 979 16
VSCM_CRATE end
DCRB_CRATE all
DCRB_SLOT all
##DCRB_W_OFFSET 7900
DCRB_W_OFFSET 7650
DCRB_CRATE end
#does not work yet !!!!!!!
#SSP_CRATE rich4
#SSP_SLOT all
#SSP_RICH_W_WIDTH 300
#SSP_RICH_W_OFFSET 7980
#SSP_CRATE end
#######################################################
#
#######################################################
# ECAL settings
#include trigger/EC/ecal_default.cnf
# include trigger/EC/ecal_newgain_prod.cnf
#
# ecal pedestals
#
FADC250_CRATE adcecal1
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 60
FADC250_TET 60
FADC250_GAIN 0.1
# include trigger/PEDS/hv_on/adcecal1_ped.cnf
FADC250_CRATE adcecal1
FADC250_SLOT 3
FADC250_ALLCH_PED 90.986 132.093 90.199 121.150 90.624 104.385 134.673 107.271 109.461 97.626 88.080 98.270 81.554 127.502 109.585 104.551
FADC250_SLOT 4
FADC250_ALLCH_PED 110.564 109.113 113.956 122.173 91.145 110.173 125.130 110.529 115.046 109.634 108.974 93.507 98.177 121.491 87.432 101.437
FADC250_SLOT 5
FADC250_ALLCH_PED 118.074 76.945 65.815 123.385 119.775 90.218 122.668 100.480 96.168 103.008 134.554 102.974 107.318 108.842 109.517 99.594
FADC250_SLOT 6
FADC250_ALLCH_PED 116.308 104.557 130.694 105.044 96.793 136.872 146.249 94.723 102.723 112.760 140.374 161.851 164.045 96.155 112.897 119.491
FADC250_SLOT 7
FADC250_ALLCH_PED 85.808 64.193 125.004 84.246 108.715 142.050 92.998 89.883 76.084 95.818 85.866 55.923 96.630 89.390 74.680 110.562
FADC250_SLOT 8
FADC250_ALLCH_PED 108.717 77.593 105.090 123.989 113.820 110.720 104.741 104.390 88.506 138.687 118.958 118.108 102.903 116.477 84.153 101.453
FADC250_SLOT 9
FADC250_ALLCH_PED 82.961 103.112 115.186 70.061 67.240 97.548 90.737 64.475 92.375 90.967 120.341 81.735 116.626 64.658 89.830 142.473
FADC250_SLOT 10
FADC250_ALLCH_PED 99.575 100.064 125.227 115.137 101.821 118.331 118.859 114.638 100.952 108.332 120.664 115.569 125.504 129.924 119.882 117.136
FADC250_SLOT 13
FADC250_ALLCH_PED 97.441 118.834 133.476 97.660 86.828 110.009 119.413 135.434 148.981 107.072 84.847 120.059 159.524 89.026 115.479 154.006
FADC250_SLOT 14
FADC250_ALLCH_PED 49.741 78.559 90.504 90.671 108.263 90.543 72.316 104.986 122.341 113.057 74.636 97.886 50.926 77.862 101.803 101.406
FADC250_SLOT 15
FADC250_ALLCH_PED 94.394 114.750 98.744 100.701 71.688 135.938 74.398 97.985 73.200 92.357 102.429 90.580 68.715 89.396 107.057 105.877
FADC250_SLOT 16
FADC250_ALLCH_PED 140.196 91.306 96.112 60.762 107.304 117.764 113.069 115.061 72.916 117.946 109.188 81.917 106.311 95.990 111.971 86.804
FADC250_SLOT 17
FADC250_ALLCH_PED 89.479 108.273 106.361 105.331 121.983 105.017 116.081 96.975 96.779 104.884 159.585 105.033 145.054 109.537 112.753 120.325
FADC250_SLOT 18
FADC250_ALLCH_PED 103.075 105.571 109.069 112.302 91.103 97.414 97.996 122.465 92.116 91.145 104.692 94.037 202.043 217.447 198.369 185.782
FADC250_SLOT 19
FADC250_ALLCH_PED 214.389 190.300 193.819 195.789 201.866 172.742 202.195 180.049 242.093 213.358 176.647 164.149 210.253 197.880 184.403 189.230
FADC250_SLOT 20
FADC250_ALLCH_PED 187.727 164.014 189.070 217.976 181.110 183.826 211.239 215.135 202.721 205.173 215.853 199.748 209.535 190.260 199.597 199.015
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcecal2
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 60
FADC250_TET 60
FADC250_GAIN 0.1
# include trigger/PEDS/hv_on/adcecal2_ped.cnf
FADC250_CRATE adcecal2
FADC250_SLOT 3
FADC250_ALLCH_PED 116.294 108.196 95.382 121.889 84.133 142.450 160.485 102.325 130.453 121.052 149.419 154.951 140.451 118.694 152.238 109.787
FADC250_SLOT 4
FADC250_ALLCH_PED 74.062 80.317 80.191 76.258 138.863 86.351 131.664 82.883 82.778 118.184 97.316 66.767 73.007 90.397 110.116 99.537
FADC250_SLOT 5
FADC250_ALLCH_PED 70.605 78.538 119.867 59.865 68.256 96.746 94.260 89.873 129.313 77.938 112.227 113.104 94.015 78.314 98.083 122.862
FADC250_SLOT 6
FADC250_ALLCH_PED 104.864 83.574 98.407 42.483 82.764 118.788 106.180 115.772 116.014 131.938 103.374 92.921 97.494 136.867 146.428 81.769
FADC250_SLOT 7
FADC250_ALLCH_PED 133.754 144.063 120.154 71.786 111.929 105.270 134.548 129.139 131.445 136.871 151.357 114.156 153.990 120.040 102.708 138.886
FADC250_SLOT 8
FADC250_ALLCH_PED 147.363 116.218 113.693 118.283 147.004 128.989 138.318 111.938 110.540 112.057 122.129 150.192 118.573 138.098 136.823 85.129
FADC250_SLOT 9
FADC250_ALLCH_PED 94.169 94.160 109.666 85.310 87.067 95.305 111.268 111.298 94.396 107.284 101.038 72.031 92.249 80.780 135.209 120.258
FADC250_SLOT 10
FADC250_ALLCH_PED 60.863 76.491 108.259 99.963 89.414 99.503 77.486 87.869 90.863 98.230 99.475 92.707 97.531 105.251 92.719 71.652
FADC250_SLOT 13
FADC250_ALLCH_PED 106.057 106.824 130.615 60.370 97.588 94.984 115.351 104.978 64.106 114.275 142.230 114.444 73.201 141.301 63.023 53.170
FADC250_SLOT 14
FADC250_ALLCH_PED 86.471 102.134 92.918 101.867 60.718 99.872 87.272 77.972 97.520 90.229 107.716 80.242 72.582 84.954 64.470 60.032
FADC250_SLOT 15
FADC250_ALLCH_PED 140.040 125.762 98.684 75.996 114.040 130.623 123.585 134.555 130.824 123.644 149.016 95.061 118.752 119.250 124.310 101.740
FADC250_SLOT 16
FADC250_ALLCH_PED 72.885 123.939 125.134 110.977 95.832 113.254 86.500 66.893 111.210 107.053 122.140 74.099 86.418 68.088 52.569 114.376
FADC250_SLOT 17
FADC250_ALLCH_PED 111.709 63.584 108.617 96.970 83.396 139.155 148.329 126.928 115.313 98.816 121.119 136.850 103.906 83.159 116.742 89.736
FADC250_SLOT 18
FADC250_ALLCH_PED 129.258 69.639 98.764 81.125 135.294 115.073 111.229 102.999 105.962 130.259 76.656 82.696 228.137 174.409 180.884 160.639
FADC250_SLOT 19
FADC250_ALLCH_PED 224.982 192.687 214.814 221.543 182.963 216.574 205.648 198.923 208.624 198.807 198.839 179.262 240.498 206.320 195.587 187.279
FADC250_SLOT 20
FADC250_ALLCH_PED 158.864 135.395 181.897 176.976 196.726 186.628 208.535 189.421 179.344 209.785 174.879 173.875 177.836 173.990 200.973 179.505
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcecal3
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 60
FADC250_TET 60
FADC250_GAIN 0.1
FADC250_SLOT 13
FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1
FADC250_ALLCH_GAIN 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.0 0.1
# include trigger/PEDS/hv_on/adcecal3_ped.cnf
FADC250_CRATE adcecal3
FADC250_SLOT 3
FADC250_ALLCH_PED 113.712 114.385 82.836 56.757 108.078 100.665 104.677 99.459 86.653 117.213 74.306 123.428 119.042 112.150 93.096 82.276
FADC250_SLOT 4
FADC250_ALLCH_PED 104.263 102.455 89.193 109.950 108.077 95.374 108.177 109.320 140.215 120.977 86.659 132.540 115.096 120.188 77.335 105.315
FADC250_SLOT 5
FADC250_ALLCH_PED 136.933 139.832 112.666 132.539 163.823 144.432 152.595 143.019 113.396 161.854 119.561 120.610 114.352 149.555 138.774 128.562
FADC250_SLOT 6
FADC250_ALLCH_PED 128.290 106.728 117.351 149.869 103.459 124.323 149.477 113.179 112.402 104.900 121.997 122.309 107.264 109.165 106.607 149.318
FADC250_SLOT 7
FADC250_ALLCH_PED 96.137 89.556 87.034 70.274 117.023 86.986 75.826 79.219 62.904 103.933 86.850 95.683 69.006 111.397 100.141 79.832
FADC250_SLOT 8
FADC250_ALLCH_PED 131.269 94.536 121.782 101.387 119.733 109.117 124.406 145.276 118.337 129.060 105.994 106.484 127.875 117.122 64.719 103.661
FADC250_SLOT 9
FADC250_ALLCH_PED 115.214 122.128 86.085 127.781 117.044 96.140 111.058 107.150 86.035 106.547 104.699 128.006 107.569 133.920 80.876 106.553
FADC250_SLOT 10
FADC250_ALLCH_PED 127.007 147.063 122.349 122.498 125.215 125.341 115.124 130.234 114.681 136.885 164.674 128.646 148.995 132.687 154.240 117.336
FADC250_SLOT 13
FADC250_ALLCH_PED 124.497 114.031 126.603 122.148 123.965 124.121 118.798 141.617 138.316 130.799 103.949 125.390 122.291 146.200 193.578 101.728
FADC250_SLOT 14
FADC250_ALLCH_PED 126.413 118.150 142.511 102.485 105.039 95.880 132.803 87.216 152.664 92.732 115.727 129.330 122.038 109.032 122.787 106.665
FADC250_SLOT 15
FADC250_ALLCH_PED 100.230 86.659 99.083 56.684 107.601 80.570 107.028 93.149 86.913 96.853 98.778 121.665 90.877 103.566 107.589 108.601
FADC250_SLOT 16
FADC250_ALLCH_PED 94.911 83.412 99.891 83.310 134.908 113.859 87.047 95.735 98.894 86.556 118.005 88.072 119.923 96.342 82.176 116.044
FADC250_SLOT 17
FADC250_ALLCH_PED 113.755 106.721 124.279 109.259 130.191 127.804 144.149 114.048 112.233 122.715 105.535 117.865 121.984 124.535 127.030 108.098
FADC250_SLOT 18
FADC250_ALLCH_PED 147.925 139.586 130.501 97.461 121.603 93.397 116.681 109.197 121.371 98.175 103.014 92.887 226.527 184.986 199.463 233.463
FADC250_SLOT 19
FADC250_ALLCH_PED 220.452 245.238 235.836 218.593 206.302 207.655 216.706 222.248 220.413 229.576 190.993 223.967 219.529 172.943 187.386 204.550
FADC250_SLOT 20
FADC250_ALLCH_PED 170.213 189.101 201.056 199.758 217.708 204.018 193.420 222.806 203.259 176.937 231.480 206.745 195.692 193.605 163.496 223.751
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcecal4
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 60
FADC250_TET 60
FADC250_GAIN 0.1
FADC250_SLOT 17
FADC250_TRG_MASK 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1
FADC250_ALLCH_GAIN 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1
# include trigger/PEDS/hv_on/adcecal4_ped.cnf
FADC250_CRATE adcecal4
FADC250_SLOT 3
FADC250_ALLCH_PED 114.635 88.348 62.662 74.835 101.200 121.192 96.515 73.007 91.174 117.080 114.789 121.275 103.651 93.233 83.774 79.008
FADC250_SLOT 4
FADC250_ALLCH_PED 95.865 65.898 60.418 118.911 89.239 103.011 119.099 112.030 103.776 133.553 75.320 133.972 106.291 135.881 72.619 127.253
FADC250_SLOT 5
FADC250_ALLCH_PED 139.934 106.767 115.297 89.645 147.657 120.581 107.602 123.768 113.167 148.034 125.221 107.168 123.306 104.653 102.804 112.897
FADC250_SLOT 6
FADC250_ALLCH_PED 121.935 104.679 127.531 115.562 130.359 143.410 126.487 131.463 76.522 107.049 105.768 100.830 98.354 110.548 139.169 130.765
FADC250_SLOT 7
FADC250_ALLCH_PED 103.346 49.995 131.491 95.595 106.282 130.685 138.690 136.728 119.966 114.223 113.871 104.880 134.141 95.693 128.693 88.943
FADC250_SLOT 8
FADC250_ALLCH_PED 96.060 79.648 115.943 57.359 81.344 81.694 83.241 135.816 63.176 96.217 62.462 98.862 64.307 100.412 80.400 103.519
FADC250_SLOT 9
FADC250_ALLCH_PED 116.571 103.583 92.254 102.950 137.933 124.310 96.009 110.461 109.374 145.966 67.701 54.800 123.411 106.873 115.658 113.437
FADC250_SLOT 10
FADC250_ALLCH_PED 96.934 58.647 98.383 113.526 103.894 102.956 121.514 91.238 87.492 96.340 117.935 128.607 104.795 143.754 97.493 110.234
FADC250_SLOT 13
FADC250_ALLCH_PED 86.019 92.683 124.944 83.976 132.552 117.676 109.612 133.749 77.808 118.916 76.807 118.284 112.274 117.964 114.346 100.837
FADC250_SLOT 14
FADC250_ALLCH_PED 111.196 107.573 134.351 91.334 111.532 96.992 102.208 102.754 72.260 121.940 113.896 65.601 138.366 136.854 99.650 126.450
FADC250_SLOT 15
FADC250_ALLCH_PED 146.028 101.677 100.166 114.240 90.460 127.406 94.640 96.194 94.517 111.975 97.925 74.563 160.136 131.997 135.180 140.519
FADC250_SLOT 16
FADC250_ALLCH_PED 126.814 110.170 116.086 91.256 84.562 141.867 108.858 94.336 138.419 137.072 109.131 125.695 114.521 91.999 115.384 119.465
FADC250_SLOT 17
FADC250_ALLCH_PED 116.487 100.459 55.429 60.931 80.785 93.936 105.687 82.844 133.504 110.817 98.644 66.431 118.297 110.880 103.417 79.349
FADC250_SLOT 18
FADC250_ALLCH_PED 67.703 112.197 65.500 102.165 91.796 80.257 75.378 75.010 107.961 86.772 114.908 83.560 199.392 210.325 146.793 174.324
FADC250_SLOT 19
FADC250_ALLCH_PED 218.219 237.170 172.129 190.348 200.253 204.124 215.325 210.429 212.276 170.011 168.390 204.459 196.141 170.375 200.072 229.500
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcecal5
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 60
FADC250_TET 30
FADC250_GAIN 0.2
FADC250_SLOT 3
FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FADC250_ALLCH_GAIN 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2
# include trigger/PEDS/hv_on/adcecal5_ped.cnf
FADC250_CRATE adcecal5
FADC250_SLOT 3
FADC250_ALLCH_PED 123.331 110.959 134.656 125.893 137.658 141.275 122.875 83.905 91.413 112.175 107.808 135.239 95.478 117.260 89.297 139.549
FADC250_SLOT 4
FADC250_ALLCH_PED 151.746 123.789 113.246 96.484 111.551 105.311 117.305 95.229 103.441 130.297 125.082 114.232 123.295 100.980 152.820 135.910
FADC250_SLOT 5
FADC250_ALLCH_PED 127.421 131.117 80.978 114.123 103.639 97.312 139.538 133.197 146.904 136.297 100.841 132.200 128.674 104.350 116.140 133.855
FADC250_SLOT 6
FADC250_ALLCH_PED 99.637 102.623 116.203 107.344 100.472 97.223 150.628 115.365 109.179 99.841 114.760 93.804 97.951 81.991 100.796 84.465
FADC250_SLOT 7
FADC250_ALLCH_PED 122.476 120.650 113.990 100.612 95.007 144.993 129.988 83.861 125.224 112.299 109.208 124.724 126.392 72.078 112.614 78.317
FADC250_SLOT 8
FADC250_ALLCH_PED 142.577 126.202 131.840 118.196 154.212 119.011 130.547 124.914 120.573 147.500 159.248 109.995 96.126 123.996 113.513 126.005
FADC250_SLOT 9
FADC250_ALLCH_PED 110.206 80.344 76.689 53.391 83.704 86.835 88.269 51.312 102.290 111.375 90.756 119.949 138.447 95.209 69.089 105.532
FADC250_SLOT 10
FADC250_ALLCH_PED 141.818 133.015 141.727 132.906 129.574 85.801 143.126 126.857 101.928 128.287 128.932 124.889 103.201 126.395 99.700 130.582
FADC250_SLOT 13
FADC250_ALLCH_PED 130.909 96.732 114.086 121.607 90.036 131.064 136.161 94.880 102.342 123.794 111.006 118.989 89.683 110.507 94.613 110.660
FADC250_SLOT 14
FADC250_ALLCH_PED 83.628 116.046 136.442 115.199 101.787 141.538 131.986 135.860 117.176 123.919 116.266 89.122 132.694 75.493 99.264 94.068
FADC250_SLOT 15
FADC250_ALLCH_PED 155.878 114.140 131.102 111.864 97.599 122.460 119.385 80.345 129.152 113.679 148.235 112.445 96.528 97.375 124.661 85.775
FADC250_SLOT 16
FADC250_ALLCH_PED 103.213 138.447 141.258 84.143 83.237 102.045 126.707 92.773 117.059 122.383 133.600 98.195 104.162 116.822 125.094 87.559
FADC250_SLOT 17
FADC250_ALLCH_PED 117.287 100.774 114.057 118.970 72.180 128.928 132.264 141.321 110.308 133.255 123.796 105.771 140.525 146.432 104.130 147.254
FADC250_SLOT 18
FADC250_ALLCH_PED 115.111 112.166 110.953 134.306 138.759 118.004 125.899 79.395 108.617 151.427 116.132 121.282 204.739 239.538 196.663 190.788
FADC250_SLOT 19
FADC250_ALLCH_PED 206.742 239.819 216.792 183.631 203.228 235.847 171.315 230.101 206.533 195.759 159.938 198.253 221.819 205.624 213.253 194.513
FADC250_SLOT 20
FADC250_ALLCH_PED 191.344 206.911 163.022 196.818 203.186 224.229 164.165 225.950 183.476 205.877 183.714 168.085 197.095 179.448 183.034 196.908
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcecal6
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 60
FADC250_TET 60
FADC250_GAIN 0.1
# include trigger/PEDS/hv_on/adcecal6_ped.cnf
FADC250_CRATE adcecal6
FADC250_SLOT 3
FADC250_ALLCH_PED 110.696 132.012 117.724 138.078 129.297 195.821 140.544 111.117 84.073 124.017 132.575 130.096 158.826 135.276 146.929 167.565
FADC250_SLOT 4
FADC250_ALLCH_PED 148.863 149.281 106.384 123.725 140.000 99.168 102.793 123.212 136.456 113.863 124.711 133.071 123.604 127.205 105.331 116.522
FADC250_SLOT 5
FADC250_ALLCH_PED 115.761 119.254 104.177 123.732 157.702 110.184 139.867 69.375 135.270 119.440 101.895 106.980 126.228 135.927 122.417 128.345
FADC250_SLOT 6
FADC250_ALLCH_PED 103.556 58.984 72.398 115.239 94.141 119.292 110.374 112.170 114.373 86.287 69.942 80.178 98.856 99.479 99.809 94.218
FADC250_SLOT 7
FADC250_ALLCH_PED 88.117 118.304 72.438 93.681 85.419 121.737 104.038 69.462 119.593 149.429 90.029 89.136 89.179 122.265 81.058 100.947
FADC250_SLOT 8
FADC250_ALLCH_PED 119.051 91.408 132.624 84.988 107.995 108.560 113.518 100.878 157.682 98.687 101.974 128.566 119.293 94.174 141.747 90.836
FADC250_SLOT 9
FADC250_ALLCH_PED 91.118 100.766 99.990 96.337 134.469 76.271 123.833 95.821 115.544 117.439 99.940 106.894 103.440 72.848 98.461 114.820
FADC250_SLOT 10
FADC250_ALLCH_PED 131.671 124.485 134.383 73.048 132.162 136.786 106.894 151.005 114.511 139.853 137.288 156.412 110.587 139.826 119.561 119.324
FADC250_SLOT 13
FADC250_ALLCH_PED 109.460 111.686 145.687 129.431 97.025 146.971 139.616 78.372 108.586 111.048 133.941 67.937 124.453 121.155 103.880 107.346
FADC250_SLOT 14
FADC250_ALLCH_PED 131.363 102.850 119.421 103.310 103.167 107.981 126.651 102.170 121.272 81.026 122.427 86.999 139.469 110.629 107.181 90.854
FADC250_SLOT 15
FADC250_ALLCH_PED 102.559 84.880 119.979 76.377 92.572 85.767 114.343 131.453 117.305 101.935 93.671 80.641 123.131 78.637 124.886 96.919
FADC250_SLOT 16
FADC250_ALLCH_PED 141.032 104.681 109.651 100.912 90.831 158.171 136.760 85.868 136.700 136.806 107.429 119.700 136.829 89.879 115.407 140.052
FADC250_SLOT 17
FADC250_ALLCH_PED 113.635 116.531 151.542 126.688 127.989 110.300 144.791 102.524 85.441 112.715 120.646 93.408 107.889 102.703 117.217 139.597
FADC250_SLOT 18
FADC250_ALLCH_PED 128.116 136.241 127.110 84.060 95.418 123.935 101.639 99.998 101.486 87.422 106.555 94.974 194.043 202.327 182.353 207.903
FADC250_SLOT 19
FADC250_ALLCH_PED 172.140 149.831 188.817 148.085 149.314 186.072 168.910 230.035 149.534 168.141 164.974 206.868 183.741 167.734 172.303 209.554
FADC250_SLOT 20
FADC250_ALLCH_PED 202.123 180.315 208.958 204.117 169.043 227.595 216.820 225.407 224.119 239.049 205.339 224.929 195.274 178.538 191.601 192.217
FADC250_CRATE end
FADC250_CRATE end
# include trigger/EC/ecal_ltcc_tet.cnf
FADC250_CRATE adcecal5
FADC250_SLOT 18
FADC250_CH_TET 12 50
FADC250_CH_TET 13 50
FADC250_CH_TET 14 60
FADC250_CH_TET 15 50
FADC250_SLOT 19
FADC250_TET 60
FADC250_SLOT 20
FADC250_TET 60
FADC250_CRATE end
#
# helicity info is here !!!!!!!!!!!
#
FADC250_CRATE adcecal4
FADC250_SLOT 19
FADC250_W_WIDTH 16
FADC250_TET 1
FADC250_ALLCH_PED 208. 227. 162. 180. 190. 194. 205. 200. 202. 160. 158. 194. 186. 160. 190. 219.
FADC250_ADC_MASK 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0
FADC250_CRATE end
# include trigger/EC/tdcecal.cnf
#
# include it with following:
# include trigger/EC/tdcecal.cnf
#
TDC1190_CRATE tdcecal1
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcecal2
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcecal3
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcecal4
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcecal5
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcecal6
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
#
# RF signals
#
TDC1190_CRATE tdcecal4
TDC1190_SLOT 20
TDC1190_W_WIDTH 2500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
# PCAL settings
#include trigger/EC/pcal_default.cnf
# include trigger/EC/pcal_newgain_prod.cnf
#
# PCAL pedestals
#
FADC250_CRATE adcpcal1
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 156
FADC250_TET 60
FADC250_GAIN 0.0667
# include trigger/PEDS/hv_on/adcpcal1_ped.cnf
FADC250_CRATE adcpcal1
FADC250_SLOT 3
FADC250_ALLCH_PED 126.501 144.200 121.493 105.821 109.449 111.171 133.863 178.895 162.565 119.336 140.412 119.103 127.848 145.249 102.347 113.308
FADC250_SLOT 4
FADC250_ALLCH_PED 115.602 109.372 88.983 107.206 161.564 126.109 101.806 122.525 86.156 97.554 127.262 90.912 89.581 97.323 101.588 86.876
FADC250_SLOT 5
FADC250_ALLCH_PED 135.225 101.523 101.315 123.024 88.318 117.022 135.623 136.391 116.923 97.781 126.359 86.260 92.165 95.854 110.206 110.508
FADC250_SLOT 6
FADC250_ALLCH_PED 73.355 90.811 147.726 88.819 108.473 100.135 101.558 117.308 122.617 84.424 86.166 80.197 70.342 84.015 65.471 129.946
FADC250_SLOT 7
FADC250_ALLCH_PED 110.656 107.754 116.003 112.498 111.448 134.467 103.429 150.708 117.267 97.696 106.195 79.695 130.728 91.317 105.438 103.323
FADC250_SLOT 8
FADC250_ALLCH_PED 105.452 99.042 150.881 100.396 117.202 108.739 113.555 133.678 118.774 126.556 143.051 123.275 100.883 112.135 137.829 108.551
FADC250_SLOT 9
FADC250_ALLCH_PED 60.719 59.347 94.178 105.722 110.169 92.235 56.603 66.511 108.402 112.242 110.175 109.368 88.768 101.512 93.958 45.966
FADC250_SLOT 10
FADC250_ALLCH_PED 108.433 77.246 103.840 123.863 67.139 117.341 119.282 128.259 87.147 122.910 125.865 94.702 117.085 136.322 123.092 112.509
FADC250_SLOT 13
FADC250_ALLCH_PED 67.615 72.248 42.349 59.520 106.888 92.244 94.121 97.416 90.047 84.546 98.874 92.505 71.230 90.504 87.548 91.298
FADC250_SLOT 14
FADC250_ALLCH_PED 160.039 123.636 134.032 105.407 133.189 112.296 115.449 120.987 135.868 135.672 136.746 107.918 88.660 107.894 116.154 99.017
FADC250_SLOT 15
FADC250_ALLCH_PED 140.826 104.654 98.040 85.493 115.466 111.432 128.498 124.806 108.982 115.316 125.140 102.205 145.862 119.845 119.583 122.409
FADC250_SLOT 16
FADC250_ALLCH_PED 128.775 149.189 123.600 72.179 120.734 120.882 96.267 143.208 99.396 140.468 90.043 75.391 110.660 97.944 88.723 136.301
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcpcal2
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 156
FADC250_TET 60
FADC250_GAIN 0.0667
# include trigger/PEDS/hv_on/adcpcal2_ped.cnf
FADC250_CRATE adcpcal2
FADC250_SLOT 3
FADC250_ALLCH_PED 56.904 61.773 73.008 96.197 75.568 89.220 84.835 88.566 102.948 84.401 124.044 75.526 123.041 75.662 104.470 140.939
FADC250_SLOT 4
FADC250_ALLCH_PED 117.729 102.583 130.780 92.350 107.256 104.439 130.889 83.602 115.152 136.931 120.406 125.637 121.048 124.488 135.874 102.930
FADC250_SLOT 5
FADC250_ALLCH_PED 86.554 94.710 105.930 65.987 114.749 91.281 125.543 112.724 80.959 80.788 114.599 81.973 91.139 84.121 71.888 122.812
FADC250_SLOT 6
FADC250_ALLCH_PED 116.398 89.448 91.004 90.796 89.417 127.629 78.503 144.490 102.976 124.104 127.125 93.951 88.536 69.962 96.709 92.508
FADC250_SLOT 7
FADC250_ALLCH_PED 120.773 87.263 85.817 108.550 62.811 80.359 81.440 124.134 67.215 70.034 92.695 73.929 92.716 74.109 86.872 104.651
FADC250_SLOT 8
FADC250_ALLCH_PED 112.688 139.591 94.346 115.507 105.872 137.080 120.147 132.756 116.887 97.170 118.824 142.166 109.266 118.331 128.681 160.391
FADC250_SLOT 9
FADC250_ALLCH_PED 132.822 70.088 101.943 124.298 106.229 125.002 150.020 91.904 102.998 103.597 79.942 119.340 111.545 127.345 156.154 110.198
FADC250_SLOT 10
FADC250_ALLCH_PED 138.758 126.438 115.479 115.449 137.446 162.453 122.070 65.110 110.729 106.399 133.835 108.347 152.749 113.775 97.469 119.883
FADC250_SLOT 13
FADC250_ALLCH_PED 122.137 113.893 118.785 135.628 121.332 129.458 98.593 97.138 123.724 104.802 135.588 104.498 110.464 124.686 123.065 122.797
FADC250_SLOT 14
FADC250_ALLCH_PED 125.408 113.116 84.018 87.128 105.076 109.461 74.589 122.804 82.646 137.936 59.759 93.068 118.856 90.994 134.519 132.060
FADC250_SLOT 15
FADC250_ALLCH_PED 92.617 89.912 92.573 45.823 87.066 98.240 92.755 87.705 84.512 123.670 88.415 121.882 103.377 106.188 99.172 72.913
FADC250_SLOT 16
FADC250_ALLCH_PED 124.485 97.428 103.444 87.706 123.526 98.774 72.047 109.729 126.044 64.877 125.050 95.074 68.305 83.333 60.232 96.558
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcpcal3
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 156
FADC250_TET 60
FADC250_GAIN 0.0667
# include trigger/PEDS/hv_on/adcpcal3_ped.cnf
FADC250_CRATE adcpcal3
FADC250_SLOT 3
FADC250_ALLCH_PED 113.626 113.870 93.133 107.466 123.859 104.365 115.964 149.434 135.743 132.980 77.145 87.310 108.952 117.804 112.483 96.070
FADC250_SLOT 4
FADC250_ALLCH_PED 148.053 82.298 135.608 138.849 129.084 129.527 163.302 117.466 102.578 118.995 139.024 123.596 159.941 115.301 128.797 152.845
FADC250_SLOT 5
FADC250_ALLCH_PED 102.013 114.679 98.133 107.682 135.736 142.520 110.248 131.057 111.925 156.733 106.072 134.417 132.186 134.520 133.694 108.290
FADC250_SLOT 6
FADC250_ALLCH_PED 143.725 142.506 117.213 136.355 151.499 120.807 144.583 75.695 117.195 91.367 138.900 121.086 130.381 127.191 139.640 130.845
FADC250_SLOT 7
FADC250_ALLCH_PED 156.550 94.036 118.141 78.024 155.917 113.610 136.801 115.202 142.736 153.821 101.734 139.091 139.596 124.432 157.096 102.309
FADC250_SLOT 8
FADC250_ALLCH_PED 119.583 141.836 138.631 155.219 147.490 93.936 139.463 139.821 138.261 101.034 85.332 149.445 125.935 138.826 118.094 103.831
FADC250_SLOT 9
FADC250_ALLCH_PED 131.252 114.102 115.629 141.684 124.747 127.109 99.862 143.795 112.794 105.324 108.073 85.939 98.683 116.722 120.458 89.629
FADC250_SLOT 10
FADC250_ALLCH_PED 105.734 58.152 122.580 117.638 68.492 114.504 99.547 99.866 112.183 93.830 97.290 119.807 73.928 112.044 108.056 93.796
FADC250_SLOT 13
FADC250_ALLCH_PED 127.882 100.726 122.706 111.199 81.433 91.350 85.027 124.860 74.289 90.756 139.072 98.415 130.825 109.525 96.345 92.347
FADC250_SLOT 14
FADC250_ALLCH_PED 110.884 63.710 134.480 67.806 78.905 100.912 91.122 97.110 98.820 102.100 100.056 106.634 130.451 54.011 98.199 84.982
FADC250_SLOT 15
FADC250_ALLCH_PED 73.726 101.513 83.282 116.403 77.451 107.597 139.201 122.480 54.427 87.827 147.928 63.381 98.665 105.500 103.236 114.694
FADC250_SLOT 16
FADC250_ALLCH_PED 120.614 79.771 75.605 69.582 55.132 114.844 86.816 88.607 79.348 120.857 84.105 100.039 101.549 70.859 61.862 90.463
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcpcal4
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 156
FADC250_TET 60
FADC250_GAIN 0.0667
# include trigger/PEDS/hv_on/adcpcal4_ped.cnf
FADC250_CRATE adcpcal4
FADC250_SLOT 3
FADC250_ALLCH_PED 93.455 97.739 116.611 115.907 93.956 105.664 122.944 124.079 146.198 94.629 127.555 83.332 87.952 106.160 105.083 79.948
FADC250_SLOT 4
FADC250_ALLCH_PED 135.746 118.995 90.073 104.804 109.181 119.306 113.877 107.907 132.836 141.431 66.384 128.815 95.550 126.431 93.126 89.680
FADC250_SLOT 5
FADC250_ALLCH_PED 120.091 99.567 92.951 100.062 86.752 83.026 112.499 95.023 122.303 91.038 113.972 85.730 115.498 119.366 100.961 112.027
FADC250_SLOT 6
FADC250_ALLCH_PED 112.591 89.877 88.019 104.290 88.399 79.381 115.573 117.145 71.390 108.420 76.670 120.433 118.099 118.203 95.321 112.756
FADC250_SLOT 7
FADC250_ALLCH_PED 133.712 97.734 107.492 56.950 102.708 128.249 99.879 89.207 96.492 104.933 129.335 65.542 106.770 77.937 112.039 83.041
FADC250_SLOT 8
FADC250_ALLCH_PED 80.919 107.360 70.362 87.628 98.221 90.077 83.646 101.361 115.047 114.697 101.015 136.976 79.180 133.585 84.904 82.339
FADC250_SLOT 9
FADC250_ALLCH_PED 130.966 100.068 127.591 134.219 82.346 90.657 140.198 92.042 113.702 123.353 103.394 107.598 107.403 117.587 110.648 84.012
FADC250_SLOT 10
FADC250_ALLCH_PED 96.230 126.097 84.590 54.634 121.485 119.246 99.064 118.151 103.982 152.257 97.271 80.997 112.190 104.779 133.361 76.104
FADC250_SLOT 13
FADC250_ALLCH_PED 151.163 142.650 122.365 107.004 104.730 103.075 122.920 104.797 111.442 117.656 110.965 131.493 107.590 104.549 88.554 71.715
FADC250_SLOT 14
FADC250_ALLCH_PED 139.334 139.766 109.697 87.719 99.353 124.371 129.204 118.476 143.900 127.166 96.872 144.838 126.871 116.465 129.503 141.431
FADC250_SLOT 15
FADC250_ALLCH_PED 105.418 131.377 132.135 118.766 123.247 117.414 102.033 115.649 115.939 90.896 115.965 120.773 119.781 126.032 109.434 114.456
FADC250_SLOT 16
FADC250_ALLCH_PED 95.263 122.764 129.569 88.860 118.134 134.579 103.734 124.656 111.392 118.777 107.517 92.381 64.308 123.576 109.509 85.247
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcpcal5
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 156
FADC250_TET 60
FADC250_GAIN 0.0667
# include trigger/PEDS/hv_on/adcpcal5_ped.cnf
FADC250_CRATE adcpcal5
FADC250_SLOT 3
FADC250_ALLCH_PED 110.836 102.637 114.838 108.214 152.775 112.286 160.313 87.377 99.120 131.821 139.771 103.357 109.849 134.950 76.669 150.499
FADC250_SLOT 4
FADC250_ALLCH_PED 126.478 93.748 115.781 99.925 88.946 101.022 119.416 114.878 114.702 133.713 134.731 71.717 127.619 111.511 114.280 124.211
FADC250_SLOT 5
FADC250_ALLCH_PED 58.521 105.462 73.424 98.335 73.447 109.470 90.596 119.299 88.436 96.657 114.593 78.670 142.907 108.345 103.262 92.090
FADC250_SLOT 6
FADC250_ALLCH_PED 106.856 82.995 74.741 118.669 110.974 114.077 100.843 128.987 109.013 123.660 117.453 140.616 96.393 128.464 107.560 113.286
FADC250_SLOT 7
FADC250_ALLCH_PED 172.143 132.920 134.662 146.376 107.093 126.346 139.288 139.623 110.238 113.730 106.895 145.889 130.134 135.583 130.061 144.443
FADC250_SLOT 8
FADC250_ALLCH_PED 111.553 102.697 111.012 126.591 115.984 132.434 119.228 79.953 101.394 148.105 80.713 79.439 85.311 109.387 69.284 114.513
FADC250_SLOT 9
FADC250_ALLCH_PED 110.620 83.370 127.284 99.198 93.301 117.939 115.460 116.002 111.454 103.841 127.605 122.734 135.724 108.588 135.754 104.510
FADC250_SLOT 10
FADC250_ALLCH_PED 98.730 133.423 110.943 105.576 126.081 129.421 99.805 87.823 129.829 143.521 119.341 115.346 139.094 125.981 82.590 101.468
FADC250_SLOT 13
FADC250_ALLCH_PED 122.560 120.980 94.716 87.304 141.746 127.535 152.947 113.083 143.277 121.662 117.670 88.759 78.673 109.251 76.366 110.233
FADC250_SLOT 14
FADC250_ALLCH_PED 149.204 127.865 114.556 124.226 94.895 131.211 104.989 138.859 116.129 133.894 113.608 97.166 98.510 132.875 144.931 111.202
FADC250_SLOT 15
FADC250_ALLCH_PED 143.962 105.301 128.300 102.437 111.901 112.529 133.764 140.349 134.571 121.532 148.182 98.563 128.434 94.692 123.147 147.947
FADC250_SLOT 16
FADC250_ALLCH_PED 120.322 114.610 108.825 110.594 121.389 120.245 125.190 104.720 94.272 130.508 144.997 72.847 116.879 149.574 128.115 83.061
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcpcal6
FADC250_W_OFFSET 7568
FADC250_W_WIDTH 296
FADC250_NSB 12
FADC250_NSA 156
FADC250_TET 60
FADC250_GAIN 0.0667
# include trigger/PEDS/hv_on/adcpcal6_ped.cnf
FADC250_CRATE adcpcal6
FADC250_SLOT 3
FADC250_ALLCH_PED 188.850 95.374 133.157 97.328 97.097 117.521 126.182 110.476 130.318 81.342 110.976 103.522 96.114 165.029 97.614 99.690
FADC250_SLOT 4
FADC250_ALLCH_PED 134.738 102.991 105.469 112.252 90.467 125.774 110.712 76.406 75.055 139.269 119.626 118.906 100.161 115.289 109.562 88.772
FADC250_SLOT 5
FADC250_ALLCH_PED 116.039 85.653 98.551 75.857 104.997 77.224 108.085 97.008 114.589 97.907 81.478 84.009 111.836 116.979 83.428 123.056
FADC250_SLOT 6
FADC250_ALLCH_PED 105.656 89.562 131.201 76.656 112.043 120.827 118.711 115.471 130.899 112.466 116.420 89.865 94.796 112.145 119.066 118.456
FADC250_SLOT 7
FADC250_ALLCH_PED 126.797 128.553 104.246 100.333 93.709 112.180 122.263 110.710 125.916 89.690 87.167 62.389 102.901 103.421 118.077 123.331
FADC250_SLOT 8
FADC250_ALLCH_PED 106.458 144.360 88.578 95.328 116.143 139.268 119.336 109.297 140.480 107.485 82.761 109.846 101.742 142.375 107.217 129.812
FADC250_SLOT 9
FADC250_ALLCH_PED 138.480 139.801 165.199 124.200 107.588 175.280 122.158 113.513 116.252 126.259 107.661 137.081 127.264 120.861 119.770 109.148
FADC250_SLOT 10
FADC250_ALLCH_PED 114.689 127.687 100.062 89.548 109.859 132.550 134.134 122.508 105.465 115.396 124.126 96.972 120.662 122.501 92.587 134.547
FADC250_SLOT 13
FADC250_ALLCH_PED 79.638 117.615 111.374 102.408 86.117 136.795 102.850 129.333 115.100 94.798 138.633 99.994 101.178 117.039 103.758 138.130
FADC250_SLOT 14
FADC250_ALLCH_PED 136.861 139.900 109.716 86.422 121.111 91.814 110.468 145.046 76.610 114.715 71.175 73.635 140.448 101.604 86.334 104.062
FADC250_SLOT 15
FADC250_ALLCH_PED 116.750 121.782 70.917 113.466 112.039 144.716 112.854 102.136 115.499 121.546 89.601 124.373 144.593 122.077 131.096 112.979
FADC250_SLOT 16
FADC250_ALLCH_PED 98.622 93.039 119.104 102.307 109.295 110.399 131.572 123.191 92.769 96.399 80.750 93.666 99.126 150.327 118.667 94.159
FADC250_CRATE end
FADC250_CRATE end
# include trigger/EC/tdcpcal.cnf
#
# include it with following:
# include trigger/EC/tdcpcal.cnf
#
TDC1190_CRATE tdcpcal1
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcpcal2
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcpcal3
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcpcal4
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcpcal5
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcpcal6
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
# FTOF settings
# include trigger/FTOF/ftof_default.cnf
#
# ftof pedestals
#
FADC250_CRATE adcftof1
FADC250_W_OFFSET 7608
FADC250_W_WIDTH 296
# include trigger/FTOF/adcftof1_ped.cnf
FADC250_SLOT 3
FADC250_ALLCH_PED 216.775 202.948 213.167 187.079 216.837 217.750 219.255 195.670 222.351 207.795 197.138 206.436 198.429 247.901 183.019 205.065
FADC250_SLOT 4
FADC250_ALLCH_PED 192.056 192.113 206.453 208.498 220.211 221.359 212.509 183.505 204.116 202.657 161.819 242.881 192.595 197.958 208.667 189.112
FADC250_SLOT 5
FADC250_ALLCH_PED 146.067 167.575 187.099 167.599 181.864 182.829 196.464 150.164 172.106 181.122 201.471 178.280 174.191 99.198 173.705 78.038
FADC250_SLOT 6
FADC250_ALLCH_PED 230.146 260.416 225.128 208.642 199.885 130.964 259.591 138.025 237.901 261.536 222.830 243.468 110.706 134.396 78.161 130.260
FADC250_SLOT 7
FADC250_ALLCH_PED 152.050 208.841 194.158 177.941 199.435 161.379 191.383 191.069 154.069 225.957 152.615 154.595 180.199 208.888 192.774 200.114
FADC250_SLOT 8
FADC250_ALLCH_PED 180.568 198.514 168.788 184.929 206.396 210.924 196.545 145.435 193.446 199.537 185.045 221.815 213.405 166.763 202.737 203.551
FADC250_SLOT 9
FADC250_ALLCH_PED 196.897 164.696 178.533 161.642 168.521 160.381 192.732 202.549 156.715 180.686 147.612 147.420 174.555 179.411 190.422 173.611
FADC250_SLOT 10
FADC250_ALLCH_PED 194.401 166.409 179.615 164.865 191.278 193.303 170.375 198.026 184.846 213.133 173.869 182.178 180.469 157.399 190.930 169.047
FADC250_SLOT 13
FADC250_ALLCH_PED 218.217 227.861 191.881 170.106 196.043 202.534 187.308 189.200 195.984 193.534 167.905 204.331 185.597 200.211 159.214 167.409
FADC250_SLOT 14
FADC250_ALLCH_PED 165.496 185.104 187.781 191.241 200.295 195.670 181.445 213.944 215.717 209.008 209.269 158.423 191.821 210.693 196.703 199.742
FADC250_SLOT 15
FADC250_ALLCH_PED 191.007 204.421 192.138 156.801 200.695 190.183 168.414 193.103 199.734 148.096 196.043 172.018 187.569 62.022 163.903 91.192
FADC250_SLOT 16
FADC250_ALLCH_PED 190.213 143.218 136.275 162.852 172.404 150.689 176.962 136.686 167.821 137.730 152.706 157.097 156.902 45.640 186.339 53.857
# include trigger/FTOF/adcftof_fadc.cnf
FADC250_SLOT all
FADC250_SLOT 3
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 4
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 5
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 6
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 7
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 8
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 9
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 10
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 13
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 14
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 15
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 16
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_CRATE end
FADC250_CRATE adcftof2
FADC250_W_OFFSET 7608
FADC250_W_WIDTH 296
# include trigger/FTOF/adcftof2_ped.cnf
FADC250_SLOT 3
FADC250_ALLCH_PED 223.572 225.302 190.841 200.921 212.650 194.386 196.545 222.438 180.709 221.163 209.716 200.579 193.188 270.067 198.777 212.111
FADC250_SLOT 4
FADC250_ALLCH_PED 168.901 164.868 176.036 201.331 173.115 163.197 194.514 151.783 185.475 206.033 182.384 142.004 164.732 192.477 207.572 210.657
FADC250_SLOT 5
FADC250_ALLCH_PED 224.557 205.540 222.758 209.733 221.477 228.534 177.121 213.787 213.557 201.242 218.248 195.268 216.621 95.050 255.590 118.907
FADC250_SLOT 6
FADC250_ALLCH_PED 202.747 230.885 214.978 183.026 197.534 79.911 232.865 123.416 226.774 183.291 200.936 104.706 195.489 117.244 86.554 123.336
FADC250_SLOT 7
FADC250_ALLCH_PED 221.513 209.729 204.952 179.366 236.780 188.613 151.848 213.069 182.507 184.028 204.749 204.917 192.422 168.327 192.288 220.747
FADC250_SLOT 8
FADC250_ALLCH_PED 178.045 210.473 203.934 153.804 187.364 211.005 214.170 208.070 167.848 171.049 190.617 189.054 223.571 183.231 224.394 184.889
FADC250_SLOT 9
FADC250_ALLCH_PED 191.394 188.470 191.004 192.255 164.459 236.210 225.840 178.251 210.347 202.104 182.423 174.906 194.491 186.761 162.846 187.348
FADC250_SLOT 10
FADC250_ALLCH_PED 196.527 199.658 171.494 185.310 203.521 198.907 191.540 205.588 188.908 196.764 197.879 199.649 176.047 203.520 182.178 201.367
FADC250_SLOT 13
FADC250_ALLCH_PED 174.854 181.083 190.373 163.400 180.060 145.548 193.538 188.816 187.408 197.112 193.994 180.748 179.425 182.698 169.036 142.079
FADC250_SLOT 14
FADC250_ALLCH_PED 192.115 184.946 186.977 209.340 175.411 200.084 197.996 204.326 194.422 182.063 187.538 204.143 196.966 201.640 173.075 177.267
FADC250_SLOT 15
FADC250_ALLCH_PED 232.479 197.244 207.210 198.983 222.967 180.277 219.712 189.340 226.922 217.454 185.708 253.231 227.352 121.944 223.608 89.481
FADC250_SLOT 16
FADC250_ALLCH_PED 211.881 213.862 202.300 231.454 198.132 191.451 191.970 237.764 208.964 174.394 183.503 222.493 180.697 99.146 186.754 58.263
# include trigger/FTOF/adcftof_fadc.cnf
FADC250_SLOT all
FADC250_SLOT 3
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 4
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 5
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 6
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 7
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 8
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 9
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 10
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 13
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 14
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 15
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 16
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_CRATE end
FADC250_CRATE adcftof3
FADC250_W_OFFSET 7608
FADC250_W_WIDTH 296
# include trigger/FTOF/adcftof3_ped.cnf
FADC250_SLOT 3
FADC250_ALLCH_PED 207.363 220.182 213.039 212.529 202.007 219.678 234.989 214.084 193.078 230.797 187.504 230.319 222.124 187.673 209.453 241.287
FADC250_SLOT 4
FADC250_ALLCH_PED 210.080 194.402 205.765 180.415 207.176 201.895 222.417 201.571 239.741 210.845 236.967 204.770 200.134 200.673 221.480 198.045
FADC250_SLOT 5
FADC250_ALLCH_PED 198.197 167.577 218.331 189.903 204.336 161.414 235.765 181.030 176.762 200.293 212.417 200.479 183.212 53.993 172.787 93.067
FADC250_SLOT 6
FADC250_ALLCH_PED 196.220 211.371 222.211 172.861 212.709 107.938 174.459 99.602 200.080 198.325 166.952 181.884 83.897 96.119 76.561 70.568
FADC250_SLOT 7
FADC250_ALLCH_PED 198.935 193.333 214.396 240.426 199.426 205.720 202.937 205.957 177.709 203.305 186.924 214.174 212.266 168.604 216.526 210.809
FADC250_SLOT 8
FADC250_ALLCH_PED 226.689 181.768 193.834 176.716 196.973 183.497 222.518 180.362 196.035 180.786 186.611 179.099 212.624 172.579 164.029 163.595
FADC250_SLOT 9
FADC250_ALLCH_PED 224.966 235.998 192.358 181.326 198.641 152.640 223.603 225.722 199.128 194.267 206.980 234.047 190.863 211.246 200.854 207.077
FADC250_SLOT 10
FADC250_ALLCH_PED 222.971 200.333 238.591 203.337 203.031 212.494 223.508 221.054 205.151 239.110 216.439 227.650 237.981 219.948 208.509 199.203
FADC250_SLOT 13
FADC250_ALLCH_PED 198.824 198.529 194.780 181.076 162.853 155.136 199.040 179.659 175.422 197.548 192.843 174.099 220.599 177.419 168.171 180.868
FADC250_SLOT 14
FADC250_ALLCH_PED 222.203 205.093 202.205 190.049 172.143 178.979 200.189 200.717 205.886 209.563 192.967 204.342 185.665 219.075 176.229 187.400
FADC250_SLOT 15
FADC250_ALLCH_PED 175.067 159.616 152.027 137.288 159.429 189.104 177.760 166.419 182.368 186.816 176.387 204.965 195.789 40.162 192.678 86.548
FADC250_SLOT 16
FADC250_ALLCH_PED 167.560 172.167 172.325 163.214 193.242 164.571 203.584 162.851 169.423 172.167 163.559 207.783 213.221 65.468 182.251 93.985
# include trigger/FTOF/adcftof_fadc.cnf
FADC250_SLOT all
FADC250_SLOT 3
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 4
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 5
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 6
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 7
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 8
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 9
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 10
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 13
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 14
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 15
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 16
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_CRATE end
FADC250_CRATE adcftof4
FADC250_W_OFFSET 7608
FADC250_W_WIDTH 296
# include trigger/FTOF/adcftof4_ped.cnf
FADC250_SLOT 3
FADC250_ALLCH_PED 206.890 196.429 194.021 180.205 215.009 186.669 232.704 223.240 191.848 206.586 159.579 227.399 199.244 220.044 232.590 212.502
FADC250_SLOT 4
FADC250_ALLCH_PED 187.720 198.668 233.701 221.376 217.761 194.778 201.947 211.989 204.031 218.324 223.804 204.645 225.607 231.264 236.357 219.642
FADC250_SLOT 5
FADC250_ALLCH_PED 170.910 220.515 180.729 171.188 206.496 191.728 233.827 184.156 212.479 207.526 192.339 171.585 163.850 71.540 178.847 101.569
FADC250_SLOT 6
FADC250_ALLCH_PED 210.789 213.055 187.146 229.769 188.763 73.515 183.293 89.269 220.786 232.125 206.230 172.794 62.744 112.220 109.569 72.958
FADC250_SLOT 7
FADC250_ALLCH_PED 172.961 170.739 193.187 174.175 187.226 159.233 178.808 180.861 199.732 187.533 193.388 155.610 194.329 200.632 163.100 176.716
FADC250_SLOT 8
FADC250_ALLCH_PED 236.315 218.705 225.272 207.787 258.404 195.707 206.544 223.480 228.378 207.312 214.911 209.759 207.626 200.523 221.258 220.506
FADC250_SLOT 9
FADC250_ALLCH_PED 193.172 161.084 187.928 190.840 218.472 232.029 199.434 182.188 214.764 196.990 238.555 221.124 179.336 210.726 189.561 229.066
FADC250_SLOT 10
FADC250_ALLCH_PED 223.720 186.558 195.322 195.797 219.373 231.704 204.956 209.207 226.739 219.779 227.133 194.750 208.991 217.661 230.863 199.791
FADC250_SLOT 13
FADC250_ALLCH_PED 183.707 209.641 197.047 186.117 182.146 188.678 194.254 204.657 178.623 206.762 197.495 179.365 216.115 221.134 196.528 154.599
FADC250_SLOT 14
FADC250_ALLCH_PED 182.887 179.511 215.774 181.345 174.439 185.958 168.428 199.034 184.196 185.710 218.234 169.098 165.381 163.982 200.217 161.818
FADC250_SLOT 15
FADC250_ALLCH_PED 180.305 168.504 177.793 189.250 178.215 179.752 163.335 196.516 169.757 203.321 186.417 187.638 205.701 90.492 203.712 71.879
FADC250_SLOT 16
FADC250_ALLCH_PED 168.722 203.814 177.594 170.348 217.353 189.063 163.087 184.142 195.175 216.487 233.794 158.902 176.905 74.683 196.099 68.016
# include trigger/FTOF/adcftof_fadc.cnf
FADC250_SLOT all
FADC250_SLOT 3
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 4
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 5
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 6
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 7
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 8
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 9
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 10
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 13
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 14
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 15
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 16
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_CRATE end
FADC250_CRATE adcftof5
FADC250_W_OFFSET 7608
FADC250_W_WIDTH 296
# include trigger/FTOF/adcftof5_ped.cnf
FADC250_SLOT 3
FADC250_ALLCH_PED 185.494 185.170 178.104 174.900 192.242 200.914 170.079 204.543 172.818 184.331 186.601 203.792 204.251 214.715 195.781 193.107
FADC250_SLOT 4
FADC250_ALLCH_PED 204.866 204.201 212.602 218.636 209.304 228.508 203.543 207.240 227.052 244.483 201.404 222.304 214.635 201.819 222.846 207.951
FADC250_SLOT 5
FADC250_ALLCH_PED 196.470 154.784 183.342 175.681 177.477 195.529 204.182 200.702 175.535 214.810 176.734 178.650 191.023 103.650 168.943 66.204
FADC250_SLOT 6
FADC250_ALLCH_PED 189.506 167.348 214.243 184.986 207.566 104.287 215.111 103.023 201.141 233.765 202.849 191.421 102.827 91.029 49.523 79.699
FADC250_SLOT 7
FADC250_ALLCH_PED 218.516 165.535 215.817 180.554 194.859 201.341 219.089 188.853 211.897 179.250 201.191 188.252 209.179 172.971 157.179 199.020
FADC250_SLOT 8
FADC250_ALLCH_PED 173.622 200.866 202.463 170.074 153.798 173.141 144.130 185.175 213.640 162.746 200.829 207.868 214.962 204.009 186.446 175.124
FADC250_SLOT 9
FADC250_ALLCH_PED 186.726 203.266 179.624 170.638 195.421 174.467 177.369 215.195 206.823 178.576 192.977 213.392 208.508 210.358 216.657 187.662
FADC250_SLOT 10
FADC250_ALLCH_PED 197.511 202.889 169.501 154.552 162.994 216.553 173.148 189.652 210.048 169.047 169.227 150.938 226.243 189.644 171.076 192.338
FADC250_SLOT 13
FADC250_ALLCH_PED 172.300 145.366 176.403 165.686 203.376 194.356 169.249 180.344 182.036 180.167 194.033 166.256 199.250 190.939 169.783 186.227
FADC250_SLOT 14
FADC250_ALLCH_PED 235.873 194.527 158.992 191.213 154.869 191.365 220.938 173.111 173.531 213.857 188.316 177.213 174.917 184.444 188.329 134.922
FADC250_SLOT 15
FADC250_ALLCH_PED 194.749 213.922 227.437 216.856 211.791 224.784 193.885 144.776 217.152 188.681 201.269 185.564 197.971 56.071 168.479 89.771
FADC250_SLOT 16
FADC250_ALLCH_PED 175.428 220.276 218.079 184.114 195.456 193.813 217.253 199.553 189.007 171.453 189.776 194.138 186.195 70.313 156.786 76.348
# include trigger/FTOF/adcftof_fadc.cnf
FADC250_SLOT all
FADC250_SLOT 3
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 4
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 5
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 6
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 7
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 8
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 9
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 10
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 13
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 14
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 15
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 16
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_CRATE end
FADC250_CRATE adcftof6
FADC250_W_OFFSET 7608
FADC250_W_WIDTH 296
# include trigger/FTOF/adcftof6_ped.cnf
FADC250_SLOT 3
FADC250_ALLCH_PED 220.795 187.332 222.295 239.732 201.367 197.968 218.180 198.838 208.396 224.511 205.308 188.434 228.318 239.476 164.013 229.547
FADC250_SLOT 4
FADC250_ALLCH_PED 183.408 164.608 160.455 206.747 225.313 200.857 210.094 240.565 200.547 247.399 214.231 270.902 223.261 224.697 210.362 225.152
FADC250_SLOT 5
FADC250_ALLCH_PED 209.144 216.412 216.934 205.817 170.994 213.708 220.288 168.081 191.382 196.288 202.946 180.299 216.884 108.891 209.522 78.838
FADC250_SLOT 6
FADC250_ALLCH_PED 184.788 193.989 184.666 176.152 160.575 90.713 191.722 89.409 202.419 224.145 212.016 180.794 121.893 93.098 71.560 82.630
FADC250_SLOT 7
FADC250_ALLCH_PED 156.648 165.985 198.811 198.545 197.599 171.633 215.095 166.483 182.129 188.285 177.605 157.018 159.744 183.273 174.938 179.285
FADC250_SLOT 8
FADC250_ALLCH_PED 187.078 217.801 189.253 193.479 189.128 198.377 168.588 195.600 175.721 189.704 233.808 195.133 216.979 198.829 214.293 243.607
FADC250_SLOT 9
FADC250_ALLCH_PED 191.478 155.928 181.903 191.590 197.841 227.194 194.138 169.500 178.437 163.838 185.541 192.662 159.782 178.086 169.319 202.182
FADC250_SLOT 10
FADC250_ALLCH_PED 186.243 168.494 160.249 180.862 192.281 172.834 210.478 188.571 188.953 185.928 211.622 219.981 141.395 211.157 172.518 199.789
FADC250_SLOT 13
FADC250_ALLCH_PED 195.185 176.655 170.516 189.365 195.268 188.425 192.508 198.586 185.850 201.511 181.530 156.716 209.917 194.013 186.157 193.060
FADC250_SLOT 14
FADC250_ALLCH_PED 177.377 211.165 211.747 140.440 194.540 200.964 184.198 192.378 197.917 225.843 194.406 195.348 191.749 205.601 196.078 203.876
FADC250_SLOT 15
FADC250_ALLCH_PED 220.996 203.943 185.729 171.133 198.496 216.246 206.470 166.256 196.829 185.257 172.205 167.834 194.341 60.526 193.546 97.109
FADC250_SLOT 16
FADC250_ALLCH_PED 207.831 176.753 188.229 190.825 188.666 173.957 181.544 179.067 181.544 207.501 203.796 167.202 207.028 88.147 212.901 88.850
# include trigger/FTOF/adcftof_fadc.cnf
FADC250_SLOT all
FADC250_SLOT 3
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 4
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 5
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 6
FADC250_NSB 8
FADC250_NSA 28
FADC250_TET 60
FADC250_GAIN 0.125
FADC250_SLOT 7
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 8
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 9
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 10
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 13
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 14
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 15
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_SLOT 16
FADC250_NSB 8
FADC250_NSA 68
FADC250_TET 60
FADC250_GAIN 0.06
FADC250_CRATE end
# include trigger/FTOF/tdcftof.cnf
#
# include it with following:
# include trigger/FTOF/tdcftof.cnf
#
TDC1190_CRATE tdcftof1
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcftof2
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcftof3
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcftof4
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcftof5
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
TDC1190_CRATE tdcftof6
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8050
TDC1190_CRATE end
# LTCC settings
# include trigger/LTCC/ltcc_default.cnf
# LTCC FADC Trigger configuration for PRODUCTION
# Version 1.2 2/16/18
# LTCC slots are in EC crates
#
# Slot 18 has last 4 channels LTCC and 12 EC
# Slot 19, 20 are entirely LTCC
FADC250_CRATE adcecal2
FADC250_SLOT 18
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 30
FADC250_CH_TET 15 30
FADC250_SLOT 19
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 0 30
FADC250_CH_TET 1 30
FADC250_CH_TET 2 30
FADC250_CH_TET 3 30
FADC250_CH_TET 4 30
FADC250_CH_TET 5 30
FADC250_CH_TET 6 30
FADC250_CH_TET 7 30
FADC250_CH_TET 8 30
FADC250_CH_TET 9 30
FADC250_CH_TET 10 30
FADC250_CH_TET 11 30
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 30
FADC250_CH_TET 15 30
FADC250_SLOT 20
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 0 30
FADC250_CH_TET 1 30
FADC250_CH_TET 2 30
FADC250_CH_TET 3 30
FADC250_CH_TET 4 30
FADC250_CH_TET 5 30
FADC250_CH_TET 6 30
FADC250_CH_TET 7 30
FADC250_CH_TET 8 30
FADC250_CH_TET 9 30
FADC250_CH_TET 10 30
FADC250_CH_TET 11 30
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 30
FADC250_CH_TET 15 30
FADC250_CRATE end
FADC250_CRATE adcecal3
FADC250_SLOT 18
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 30
FADC250_CH_TET 15 30
FADC250_SLOT 19
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 0 30
FADC250_CH_TET 1 30
FADC250_CH_TET 2 30
FADC250_CH_TET 3 30
FADC250_CH_TET 4 30
FADC250_CH_TET 5 30
FADC250_CH_TET 6 30
FADC250_CH_TET 7 30
FADC250_CH_TET 8 30
FADC250_CH_TET 9 30
FADC250_CH_TET 10 30
FADC250_CH_TET 11 30
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 30
FADC250_CH_TET 15 30
FADC250_SLOT 20
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 0 30
FADC250_CH_TET 1 30
FADC250_CH_TET 2 30
FADC250_CH_TET 3 30
FADC250_CH_TET 4 30
FADC250_CH_TET 5 30
FADC250_CH_TET 6 30
FADC250_CH_TET 7 30
FADC250_CH_TET 8 30
FADC250_CH_TET 9 30
FADC250_CH_TET 10 30
FADC250_CH_TET 11 30
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 30
FADC250_CH_TET 15 30
FADC250_CRATE end
FADC250_CRATE adcecal5
FADC250_SLOT 18
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 50
FADC250_CH_TET 15 50
FADC250_SLOT 19
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 0 48
FADC250_CH_TET 1 26
FADC250_CH_TET 2 30
FADC250_CH_TET 3 30
FADC250_CH_TET 4 30
FADC250_CH_TET 5 25
FADC250_CH_TET 6 25
FADC250_CH_TET 7 20
FADC250_CH_TET 8 25
FADC250_CH_TET 9 30
FADC250_CH_TET 10 30
FADC250_CH_TET 11 30
FADC250_CH_TET 12 48
FADC250_CH_TET 13 48
FADC250_CH_TET 14 30
FADC250_CH_TET 15 30
FADC250_SLOT 20
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 0 30
FADC250_CH_TET 1 40
FADC250_CH_TET 2 40
FADC250_CH_TET 3 25
FADC250_CH_TET 4 30
FADC250_CH_TET 5 30
FADC250_CH_TET 6 25
FADC250_CH_TET 7 30
FADC250_CH_TET 8 30
FADC250_CH_TET 9 30
FADC250_CH_TET 10 30
FADC250_CH_TET 11 30
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 35
FADC250_CH_TET 15 35
FADC250_CRATE end
FADC250_CRATE adcecal6
FADC250_SLOT 18
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 30
FADC250_CH_TET 15 30
FADC250_SLOT 19
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 0 30
FADC250_CH_TET 1 30
FADC250_CH_TET 2 30
FADC250_CH_TET 3 30
FADC250_CH_TET 4 30
FADC250_CH_TET 5 30
FADC250_CH_TET 6 30
FADC250_CH_TET 7 30
FADC250_CH_TET 8 30
FADC250_CH_TET 9 30
FADC250_CH_TET 10 30
FADC250_CH_TET 11 30
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 30
FADC250_CH_TET 15 30
FADC250_SLOT 20
FADC250_NSB 12
FADC250_NSA 60
FADC250_CH_TET 0 30
FADC250_CH_TET 1 30
FADC250_CH_TET 2 30
FADC250_CH_TET 3 30
FADC250_CH_TET 4 30
FADC250_CH_TET 5 30
FADC250_CH_TET 6 30
FADC250_CH_TET 7 30
FADC250_CH_TET 8 30
FADC250_CH_TET 9 30
FADC250_CH_TET 10 30
FADC250_CH_TET 11 30
FADC250_CH_TET 12 30
FADC250_CH_TET 13 30
FADC250_CH_TET 14 30
FADC250_CH_TET 15 30
FADC250_CRATE end
# CTOF/HTCC settings
# include trigger/CTOF_HTCC/ctof_htcc_newgain_prod.cnf
#
# CTOF/HTCC pedestals
#
FADC250_CRATE adcctof1
# include trigger/CTOF_HTCC/adcctof1_ped.cnf
FADC250_CRATE adcctof1
FADC250_SLOT 3
FADC250_TET 60
FADC250_ALLCH_PED 116.229 102.218 102.902 101.321 99.051 80.344 146.162 98.027 125.499 102.141 108.177 91.796 117.292 106.230 107.963 123.709
FADC250_SLOT 4
FADC250_TET 60
FADC250_ALLCH_PED 136.355 141.667 113.728 77.648 101.296 112.943 111.768 132.398 154.590 168.694 116.738 108.247 140.550 107.384 113.653 109.115
FADC250_SLOT 5
FADC250_TET 60
FADC250_ALLCH_PED 110.627 109.331 143.230 146.247 149.951 152.592 147.523 155.607 112.774 155.627 159.957 160.644 133.387 130.698 150.350 158.610
FADC250_SLOT 6
FADC250_TET 60
FADC250_ALLCH_PED 128.549 115.673 109.843 135.776 75.796 117.560 131.153 103.679 126.728 128.067 100.951 125.254 94.152 142.218 124.120 106.835
FADC250_SLOT 7
FADC250_TET 60
FADC250_ALLCH_PED 90.327 121.980 93.660 94.262 89.269 125.218 131.499 117.481 114.895 108.816 100.932 97.378 119.365 99.494 114.061 74.710
FADC250_SLOT 8
FADC250_TET 60
FADC250_ALLCH_PED 125.246 111.659 133.249 133.330 157.840 133.120 108.566 84.769 139.837 121.479 118.901 151.707 145.721 130.169 139.345 103.383
FADC250_SLOT 13
FADC250_TET 15
FADC250_ALLCH_PED 92.229 112.749 129.384 67.532 89.436 119.716 99.237 88.144 70.141 139.769 114.187 90.328 90.281 104.123 72.257 124.552
FADC250_SLOT 14
FADC250_TET 15
FADC250_ALLCH_PED 98.001 82.872 90.940 81.580 88.140 91.201 92.438 94.413 43.912 71.718 114.192 94.507 93.631 83.634 72.446 103.157
FADC250_SLOT 15
FADC250_TET 15
FADC250_ALLCH_PED 47.838 94.644 106.132 93.174 101.346 81.368 104.452 81.963 109.441 90.711 98.563 81.947 78.236 121.632 75.974 94.384
FADC250_CRATE end
FADC250_CRATE end
FADC250_CRATE adcctof1
# include trigger/CTOF_HTCC/adcctof1_gain.cnf
#Markov: these gains correspond to the result of the calibration of the HTCC
#FADC250_CRATE adcctof1
#FADC250_SLOT 13
#FADC250_ALLCH_GAIN 0.049 0.049 0.050 0.047 0.050 0.049 0.048 0.044 0.049 0.049 0.054 0.047 0.046 0.049 0.049 0.048
#FADC250_SLOT 14
#FADC250_ALLCH_GAIN 0.050 0.048 0.049 0.048 0.050 0.048 0.048 0.049 0.044 0.046 0.050 0.046 0.049 0.049 0.049 0.050
#FADC250_SLOT 15
#FADC250_ALLCH_GAIN 0.050 0.050 0.045 0.049 0.049 0.049 0.049 0.048 0.049 0.049 0.050 0.050 0.049 0.045 0.050 0.049
#FADC250_CRATE end
# Sergey: new settings on Markov's request Jan 28 15:00
# Markov: this gains correposnds to the normalized signal in all PMTS on top of the calibratioFeb 02 2018
#FADC250_CRATE adcctof1
#FADC250_SLOT 13
#FADC250_ALLCH_GAIN 0.041 0.047 0.057 0.047 0.052 0.039 0.047 0.044 0.043 0.059 0.039 0.047 0.074 0.060 0.036 0.048
#FADC250_NSB 12
#FADC250_NSA 60
#FADC250_SLOT 14
#FADC250_ALLCH_GAIN 0.041 0.043 0.043 0.048 0.056 0.045 0.050 0.049 0.046 0.053 0.037 0.046 0.075 0.058 0.043 0.050
#FADC250_NSB 12
#FADC250_NSA 60
#FADC250_SLOT 15
#FADC250_ALLCH_GAIN 0.054 0.030 0.067 0.049 0.049 0.085 0.096 0.048 0.046 0.050 0.059 0.050 0.039 0.052 0.055 0.049
#FADC250_NSB 12
#FADC250_NSA 60
# Markov: this gains correposnds to the normalized signal in all PMTS on top of the calibratioFeb 14 2018
FADC250_SLOT 13
FADC250_ALLCH_GAIN 0.041 0.035 0.063 0.047 0.046 0.027 0.043 0.044 0.038 0.053 0.043 0.047 0.069 0.046 0.051 0.048
FADC250_SLOT 14
FADC250_ALLCH_GAIN 0.042 0.044 0.061 0.048 0.054 0.046 0.059 0.049 0.042 0.063 0.063 0.046 0.066 0.061 0.079 0.050
FADC250_SLOT 15
FADC250_ALLCH_GAIN 0.056 0.031 0.072 0.049 0.049 0.092 0.119 0.048 0.041 0.047 0.043 0.050 0.035 0.043 0.051 0.049
FADC250_CRATE end
FADC250_CRATE end
# include trigger/CTOF_HTCC/tdcctof1.cnf
#
# include it with following:
# include trigger/CTOF_HTCC/tdcctof1.cnf
#
TDC1190_CRATE tdcctof1
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8250
TDC1190_CRATE end
#
# extra shift for CTOF
#
FADC250_CRATE adcctof1
FADC250_SLOT 3
#FADC250_W_OFFSET 7980
FADC250_W_OFFSET 7730
FADC250_W_WIDTH 296
FADC250_GAIN 0.04
FADC250_SLOT 4
#FADC250_W_OFFSET 7980
FADC250_W_OFFSET 7730
FADC250_W_WIDTH 296
FADC250_GAIN 0.04
FADC250_SLOT 5
#FADC250_W_OFFSET 7980
FADC250_W_OFFSET 7730
FADC250_W_WIDTH 296
FADC250_GAIN 0.04
FADC250_SLOT 6
#FADC250_W_OFFSET 7980
FADC250_W_OFFSET 7730
FADC250_W_WIDTH 296
FADC250_GAIN 0.04
FADC250_SLOT 7
#FADC250_W_OFFSET 7980
FADC250_W_OFFSET 7730
FADC250_W_WIDTH 296
FADC250_GAIN 0.04
FADC250_SLOT 8
#FADC250_W_OFFSET 7980
FADC250_W_OFFSET 7730
FADC250_W_WIDTH 296
FADC250_GAIN 0.04
FADC250_SLOT 13
#FADC250_W_OFFSET 7980
#FADC250_W_OFFSET 7730
FADC250_W_OFFSET 7670
FADC250_TRG_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FADC250_SLOT 14
#FADC250_W_OFFSET 7980
#FADC250_W_OFFSET 7730
FADC250_W_OFFSET 7670
FADC250_TRG_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FADC250_SLOT 15
#FADC250_W_OFFSET 7980
#FADC250_W_OFFSET 7730
FADC250_W_OFFSET 7670
FADC250_TRG_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FADC250_CRATE end
# CND settings
# include trigger/CND/cnd_prod.cnf
#
# cnd cosmic
#
#
# FADCs
#
FADC250_CRATE adccnd1
FADC250_SLOT all
FADC250_TET 60
FADC250_NSB 12
FADC250_NSA 60
FADC250_W_OFFSET 7730
FADC250_W_WIDTH 400
# include trigger/PEDS/hv_off/adccnd1_ped.cnf
FADC250_CRATE adccnd1
FADC250_SLOT 3
FADC250_ALLCH_PED 161.808 153.560 173.605 161.486 165.885 161.411 167.005 223.089 180.868 268.049 184.792 136.400 199.480 166.363 189.840 177.261
FADC250_SLOT 4
FADC250_ALLCH_PED 179.688 170.637 161.415 170.810 208.033 181.590 186.878 197.484 186.054 185.903 179.412 218.353 189.898 176.049 197.055 166.380
FADC250_SLOT 5
FADC250_ALLCH_PED 151.044 146.501 180.292 154.260 155.601 182.147 174.676 181.338 201.530 172.510 222.659 165.534 141.617 200.394 148.601 205.534
FADC250_SLOT 6
FADC250_ALLCH_PED 163.524 188.565 173.248 131.599 117.587 210.275 169.075 159.391 199.227 215.283 182.221 168.819 227.909 196.975 176.550 188.384
FADC250_SLOT 7
FADC250_ALLCH_PED 201.335 192.447 223.134 201.538 217.766 228.960 227.365 211.914 221.868 187.339 213.791 220.601 202.982 175.816 210.354 182.659
FADC250_SLOT 8
FADC250_ALLCH_PED 196.344 174.822 167.392 118.610 213.183 199.688 191.234 201.898 224.755 242.210 246.103 227.217 219.450 252.123 222.841 245.328
FADC250_SLOT 9
FADC250_ALLCH_PED 159.456 171.747 160.831 131.204 148.838 155.683 175.998 193.077 163.744 176.947 187.459 168.286 173.090 184.775 174.485 167.321
FADC250_SLOT 10
FADC250_ALLCH_PED 191.204 204.698 219.850 190.100 257.144 208.535 219.270 199.646 158.029 160.845 171.981 143.469 162.365 136.628 156.854 168.574
FADC250_SLOT 13
FADC250_ALLCH_PED 195.905 176.115 180.629 176.311 170.399 169.909 127.812 228.481 191.015 149.831 166.618 162.831 188.204 175.346 164.771 155.418
FADC250_CRATE end
FADC250_CRATE end
#
# TDCs
#
# include trigger/CND/adccnd1.cnf
#
# include it with following:
# include trigger/CND/adccnd1.cnf
#
TDC1190_CRATE adccnd1
TDC1190_SLOT all
TDC1190_W_WIDTH 500
TDC1190_W_OFFSET -8200
TDC1190_CRATE end
#FT CAL AND HODO
# include trigger/FT/ft_default.cnf
# Default trigger file for FT #
# This is loaded during DOWNLOAD, since the main trigger file should include this.
# Note that adcft1,adcft2,adcft3 also take settings from files $CLON_PARMS/fadc250/adcftN.cnf. However, the present file is downloaded AFTER, hence if there are different settings here, these will be used.
FADC250_CRATE adcft1
FADC250_SLOT all
FADC250_DAC 3300
#raw mode
FADC250_MODE 1
FADC250_NSB 20
FADC250_NSA 120
FADC250_NPEAK 1
##FADC250_W_OFFSET 7980
##FADC250_W_OFFSET 7730
FADC250_W_OFFSET 7722
#pulse mode
##FADC250_MODE 3
##FADC250_NSB 20
##FADC250_NSA 120
##FADC250_NPEAK 3
# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
#FADC250_TET_IGNORE_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
###########################FADC250_CRATE end
# Note:
# 1) threshold used here is for both readout and triggering
# 2) if no zero suppresion is desired (i.e. want to readout all channels)
# then set FADC250_TETIGNORE_MASK to all 1s and this will ignore
# the threshold value for readout and only use it for triggering
# 3) this threshold is relative to the fadc pedestal/offsets used
FADC250_TET 15
#FADC250_TET 0
# include trigger/PEDS/hv_on/adcft1_ped.cnf
FADC250_SLOT 3
FADC250_ALLCH_PED 177.906 170.621 201.975 227.809 215.790 232.795 214.993 191.968 186.313 173.973 204.550 222.766 175.847 175.713 172.148 194.662
FADC250_SLOT 4
FADC250_ALLCH_PED 171.847 187.301 187.001 176.049 185.508 165.493 170.540 166.077 190.064 163.422 233.571 230.896 195.607 169.498 185.809 161.153
FADC250_SLOT 5
FADC250_ALLCH_PED 180.904 193.786 189.091 166.608 193.904 221.408 208.543 186.727 204.096 167.861 202.116 235.018 204.123 196.758 206.204 174.262
FADC250_SLOT 6
FADC250_ALLCH_PED 175.869 233.042 190.252 210.984 191.270 177.593 212.819 192.993 169.421 213.465 207.230 202.723 202.888 201.337 171.775 209.552
FADC250_SLOT 7
FADC250_ALLCH_PED 149.211 173.347 141.702 181.027 157.187 186.137 173.070 211.562 159.587 197.846 166.256 158.807 171.695 191.528 174.790 184.921
FADC250_SLOT 8
FADC250_ALLCH_PED 175.473 198.637 214.513 185.229 228.014 191.906 147.087 183.213 188.847 207.003 215.496 194.264 177.849 201.347 193.902 181.100
FADC250_SLOT 9
FADC250_ALLCH_PED 188.686 196.495 209.309 212.625 195.187 193.800 204.520 193.002 163.666 212.051 171.415 173.422 186.557 188.445 203.843 180.512
FADC250_SLOT 10
FADC250_ALLCH_PED 194.422 179.409 191.215 200.472 167.163 193.557 188.827 194.480 206.970 215.629 207.877 235.117 215.017 206.068 213.937 201.559
FADC250_SLOT 13
FADC250_ALLCH_PED 185.531 228.907 219.258 216.613 205.426 224.380 226.402 225.263 227.267 232.716 202.630 185.784 216.438 223.807 194.643 207.842
FADC250_SLOT 14
FADC250_ALLCH_PED 221.923 178.496 189.729 193.929 234.322 216.707 187.411 228.719 217.772 247.649 187.035 151.621 193.387 214.161 195.449 165.924
FADC250_SLOT 15
FADC250_ALLCH_PED 196.110 197.520 180.709 203.038 187.286 195.674 230.961 200.297 213.706 194.403 212.391 241.305 197.264 199.265 200.250 201.125
# include trigger/FT/adcft1_gain.cnf
#
# File generated by code makeGainFiles (author: Andrea Celentano) on: 2018-02-19.14:44:28
# Gain file used: ElasticCalibration.txt
#
FADC250_SLOT 3
FADC250_ALLCH_GAIN 0.138959 0.181427 0.151113 0.160054 0.163781 0.176343 0.226183 0.142776 0.194914 0.198342 0.147642 0.149975 0.186813 0.185941 0.183882 0.100963
FADC250_SLOT 4
FADC250_ALLCH_GAIN 0.149787 0.150998 0.186813 0.212892 0.146664 0.186813 0.175411 0.167969 0.190991 0.213044 0.186813 0.174032 0.153874 0.186813 0.186813 0.216752
FADC250_SLOT 5
FADC250_ALLCH_GAIN 0.178289 0.180007 0.204656 0.184906 0.160312 0.168347 0.164956 0.272223 0.1994 0.166519 0.211986 0.207498 0.162314 0.133141 0.167311 0.285075
FADC250_SLOT 6
FADC250_ALLCH_GAIN 0.169014 0.169205 0.305312 0.140066 0.172327 0.146916 0.149227 0.163602 0.169734 0.14023 0.129844 0.138444 0.138188 0.15293 0.1534 0.223561
FADC250_SLOT 7
FADC250_ALLCH_GAIN 0.131849 0.133736 0.118942 0.147971 0.163647 0.170996 0.157815 0.145168 0.141157 0.177074 0.144957 0.153047 0.146988 0.162358 0.146556 0.145203
FADC250_SLOT 8
FADC250_ALLCH_GAIN 0.142537 0.139869 0.186813 0.154391 0.145062 0.131587 0.140494 0.131356 0.13317 0.160441 0.160097 0.168823 0.148818 0.142844 0.14538 0.125142
FADC250_SLOT 9
FADC250_ALLCH_GAIN 0.166194 0.143117 0.162711 0.143599 0.161002 0.222066 0.130183 0.151227 0.149003 0.15899 0.128009 0.186813 0.140428 0.174745 0.143495 0.202302
FADC250_SLOT 10
FADC250_ALLCH_GAIN 0.186813 0.142639 0.136142 0.185193 0.141091 0.184849 0.165964 0.154391 0.134126 0.152267 0.169157 0.150013 0.142232 0.147971 0.171585 0.200807
FADC250_SLOT 13
FADC250_ALLCH_GAIN 0.144014 0.290901 0.186813 0.186813 0.176291 0.196258 0.154791 0.16578 0.171388 0.267592 0.186813 0.186813 0.175617 0.186813 0.147206 0.166844
FADC250_SLOT 14
FADC250_ALLCH_GAIN 0.194091 0.146448 0.186813 0.176708 0.141592 0.160527 0.145876 0.178289 0.144501 0.186813 0.173729 0.152578 0.165047 0.186463 0.221736 0.150656
FADC250_SLOT 15
FADC250_ALLCH_GAIN 0.170265 0.12867 0.140891 0.281054 0.156003 0.175669 0.185422 0.164231 0.136236 0.164186 0.213044 0.178289 1 1 1 1
# include trigger/FT/adcft1_delay.cnf
#FADC250_CH_DELAY 0 0 <- channel# and delay in ns (will be converted to clocks later)
#FADC250_ALLCH_DELAY 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FADC250_SLOT 3
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 4
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 5
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 6
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 7
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 8
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 9
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 10
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 13
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 14
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 15
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_CRATE end
FADC250_CRATE adcft2
FADC250_SLOT all
FADC250_DAC 3300
#raw mode
FADC250_MODE 1
FADC250_NSB 20
FADC250_NSA 120
FADC250_NPEAK 1
##FADC250_W_OFFSET 7980
##FADC250_W_OFFSET 7730
FADC250_W_OFFSET 7722
#pulse mode
##FADC250_MODE 3
##FADC250_NSB 20
##FADC250_NSA 120
##FADC250_NPEAK 3
# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
#FADC250_TET_IGNORE_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
###############################FADC250_CRATE end
# Note:
# 1) threshold used here is for both readout and triggering
# 2) if no zero suppresion is desired (i.e. want to readout all channels)
# then set FADC250_TETIGNORE_MASK to all 1s and this will ignore
# the threshold value for readout and only use it for triggering
# 3) this threshold is relative to the fadc pedestal/offsets used
FADC250_TET 15
#FADC250_TET 0
# include trigger/PEDS/hv_on/adcft2_ped.cnf
FADC250_SLOT 3
FADC250_ALLCH_PED 207.923 181.825 212.486 186.950 211.155 189.443 204.270 182.762 197.493 191.067 196.050 216.852 171.493 198.989 181.651 211.217
FADC250_SLOT 4
FADC250_ALLCH_PED 208.811 150.956 152.055 164.767 191.918 175.678 181.278 187.777 170.492 202.703 220.202 171.270 187.150 158.526 199.301 221.201
FADC250_SLOT 5
FADC250_ALLCH_PED 202.898 210.030 201.771 201.944 189.438 218.105 156.208 170.743 204.952 230.230 192.700 158.473 202.231 195.861 173.227 195.575
FADC250_SLOT 6
FADC250_ALLCH_PED 210.549 242.910 210.126 184.666 219.091 219.847 231.139 202.018 201.429 223.502 220.159 206.798 244.305 234.625 235.864 236.945
FADC250_SLOT 7
FADC250_ALLCH_PED 185.777 177.264 199.489 180.235 179.320 207.792 188.812 214.847 195.934 189.568 208.613 195.610 173.346 192.207 212.750 200.186
FADC250_SLOT 8
FADC250_ALLCH_PED 180.733 217.573 145.269 190.336 229.798 169.700 195.709 159.982 195.041 180.507 178.518 220.465 208.345 199.818 169.218 233.803
FADC250_SLOT 9
FADC250_ALLCH_PED 217.288 198.413 209.813 175.063 188.080 180.490 173.213 179.055 198.948 219.779 154.104 176.910 184.431 169.399 204.439 175.367
FADC250_SLOT 10
FADC250_ALLCH_PED 217.584 219.594 199.317 185.039 209.218 220.213 173.840 181.768 199.318 227.795 190.671 205.169 187.746 225.134 180.760 219.451
FADC250_SLOT 13
FADC250_ALLCH_PED 194.590 195.279 204.075 218.612 189.171 200.629 216.503 204.157 193.753 221.961 181.569 234.295 179.276 182.137 194.259 187.234
FADC250_SLOT 14
FADC250_ALLCH_PED 188.026 166.616 199.457 140.538 141.130 205.927 231.594 204.797 189.224 201.316 176.397 209.593 203.466 172.255 199.010 195.539
# include trigger/FT/adcft2_gain.cnf
#
# File generated by code makeGainFiles (author: Andrea Celentano) on: 2018-02-19.14:44:28
# Gain file used: ElasticCalibration.txt
#
FADC250_SLOT 3
FADC250_ALLCH_GAIN 0.186813 0.169927 0.216203 0.184279 0.172029 0.186813 0.186813 0.158232 0.251283 0.162226 0.17198 0.147496 0.163468 0.154831 0.186813 0.242221
FADC250_SLOT 4
FADC250_ALLCH_GAIN 0.169493 0.257673 0.186813 0.157399 0.147897 0.185884 0.186813 0.189178 0.154271 0.162933 0.162756 0.186813 0.153282 0.186813 0.136547 0.257562
FADC250_SLOT 5
FADC250_ALLCH_GAIN 0.240274 0.142435 0.184393 0.143358 0.133916 0.147314 0.178076 0.227734 0.168016 0.240274 0.148117 0.180496 0.148191 0.12148 0.134913 0.181372
FADC250_SLOT 6
FADC250_ALLCH_GAIN 0.16057 0.142639 0.159117 0.1708 0.164684 0.147678 0.170996 0.151803 0.166426 0.149488 0.153558 0.152151 0.146628 0.16778 0.147496 0.157068
FADC250_SLOT 7
FADC250_ALLCH_GAIN 0.153677 0.150504 0.143323 0.142639 0.203058 0.186813 0.153361 0.156452 0.144571 0.154631 0.151958 0.139478 0.166333 0.185078 0.186289 0.175
FADC250_SLOT 8
FADC250_ALLCH_GAIN 0.143875 0.172675 0.138701 0.135679 0.186813 0.16703 0.136578 0.145734 0.159499 0.148007 0.186813 0.179628 0.148375 0.168871 0.159456 0.150732
FADC250_SLOT 9
FADC250_ALLCH_GAIN 0.150201 0.1273 0.139056 0.262194 0.151765 0.157027 0.144118 0.171536 0.138765 0.148707 0.186813 0.186813 0.187693 0.182479 0.148707 0.209681
FADC250_SLOT 10
FADC250_ALLCH_GAIN 0.186813 0.154311 0.175154 0.139283 0.148154 0.158526 0.183431 0.15794 0.152423 0.149264 0.144957 0.186813 0.143255 0.156739 0.184279 0.242614
FADC250_SLOT 13
FADC250_ALLCH_GAIN 0.201892 0.254059 0.159201 0.186813 0.192839 0.132403 0.186813 0.171733 0.271235 0.2546 0.186813 0.186813 0.145557 0.152423 0.157151 0.184166
FADC250_SLOT 14
FADC250_ALLCH_GAIN 0.184906 0.187988 0.186813 0.163781 0.164051 0.135494 0.240952 0.170508 0.234616 0.147061 0.145097 0.186813 0.164502 0.169301 0.136453 0.160656
# include trigger/FT/adcft2_delay.cnf
#FADC250_CH_DELAY 0 0 <- channel# and delay in ns (will be converted to clocks later)
#FADC250_ALLCH_DELAY 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FADC250_SLOT 3
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 4
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 5
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 6
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 7
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 8
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 9
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 10
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 13
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
FADC250_SLOT 14
FADC250_ALLCH_DELAY 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40
#FADC250_SLOTS 4
#FADC250_CH_TET 12 110
FADC250_CRATE end
FADC250_CRATE adcft3
FADC250_SLOT all
FADC250_DAC 3300
#raw mode
FADC250_MODE 1
FADC250_NSB 10
FADC250_NSA 50
FADC250_NPEAK 1
##FADC250_W_OFFSET 7980
FADC250_W_OFFSET 7730
#pulse mode
##FADC250_MODE 3
##FADC250_NSB 10
##FADC250_NSA 50
##FADC250_NPEAK 3
# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
#FADC250_TET_IGNORE_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
#######################FADC250_CRATE end
# Note:
# 1) threshold used here is for both readout and triggering
# 2) if no zero suppresion is desired (i.e. want to readout all channels)
# then set FADC250_TETIGNORE_MASK to all 1s and this will ignore
# the threshold value for readout and only use it for triggering
# 3) this threshold is relative to the fadc pedestal/offsets used
FADC250_TET 50
#FADC250_TET 0
# include trigger/PEDS/hv_on/adcft3_ped.cnf
FADC250_SLOT 3
FADC250_ALLCH_PED 165.265 150.652 191.760 169.235 210.171 239.140 210.629 203.251 181.249 196.780 175.447 170.801 193.187 176.055 196.909 187.061
FADC250_SLOT 4
FADC250_ALLCH_PED 199.493 273.222 369.037 173.652 200.141 215.911 197.189 207.548 190.992 168.982 227.176 197.202 169.011 201.322 179.117 222.171
FADC250_SLOT 5
FADC250_ALLCH_PED 209.529 186.806 225.199 195.088 102.509 208.829 221.288 93.696 196.647 225.660 225.025 215.387 208.707 203.730 237.810 208.404
FADC250_SLOT 6
FADC250_ALLCH_PED 191.744 200.740 184.571 181.545 135.225 201.432 199.437 186.536 219.766 211.788 218.326 204.276 169.375 222.766 189.588 194.181
FADC250_SLOT 7
FADC250_ALLCH_PED 193.291 233.771 211.736 203.519 209.404 214.365 209.261 211.714 216.671 212.644 232.023 224.911 207.291 205.660 218.950 223.455
FADC250_SLOT 8
FADC250_ALLCH_PED 197.451 191.081 170.921 169.867 148.552 199.463 184.436 200.271 211.496 212.510 208.582 208.140 207.007 197.611 227.458 190.631
FADC250_SLOT 9
FADC250_ALLCH_PED 229.864 172.201 170.057 198.473 174.052 177.109 185.279 217.160 207.618 191.749 171.903 196.924 173.815 192.343 179.288 209.130
FADC250_SLOT 10
FADC250_ALLCH_PED 193.779 216.595 207.403 224.388 201.811 215.932 212.914 170.912 209.123 231.203 210.381 205.162 198.702 203.344 187.816 228.975
FADC250_SLOT 13
FADC250_ALLCH_PED 226.280 177.165 174.785 184.113 223.674 207.917 230.104 225.863 240.380 204.697 182.599 180.742 188.150 208.862 209.444 199.280
FADC250_SLOT 14
FADC250_ALLCH_PED 189.392 215.718 202.758 206.934 209.834 198.482 225.798 211.147 187.834 202.942 188.945 202.340 210.241 237.428 232.447 193.982
FADC250_SLOT 15
FADC250_ALLCH_PED 214.853 196.559 183.246 205.132 220.547 210.217 225.085 208.536 206.058 200.632 183.446 200.256 205.600 205.400 229.407 215.074
FADC250_SLOT 16
FADC250_ALLCH_PED 181.473 200.825 212.493 179.498 200.738 201.131 200.143 203.414 224.596 196.494 152.526 207.256 162.902 206.368 173.901 155.851
FADC250_SLOT 17
FADC250_ALLCH_PED 207.539 222.683 192.745 178.561 202.161 179.752 194.698 172.454 210.810 182.661 215.748 236.293 175.244 199.209 200.211 202.426
FADC250_SLOT 18
FADC250_ALLCH_PED 214.664 199.769 192.628 188.646 190.767 185.089 208.692 212.094 225.046 206.694 196.524 241.537 201.317 180.219 195.567 200.588
FADC250_SLOT 19
FADC250_ALLCH_PED 189.912 197.602 177.433 218.459 234.587 200.843 217.229 220.421 184.734 180.998 225.700 184.401 201.921 213.910 177.800 196.136
# include trigger/FT/adcft3_gain.cnf
FADC250_SLOT 3
FADC250_ALLCH_GAIN 0.021687 0.023909 0.023006 0.023671 0.023042 0.023397 0.022775 0.023326 0.023133 0.022021 0.020542 0.020927 0.022176 0.019920 0.021516 0.022563
FADC250_SLOT 4
FADC250_ALLCH_GAIN 0.022253 0.022252 0.022455 0.023042 0.022773 0.023469 0.022599 0.022479 0.022246 0.021154 0.021731 0.021625 0.019619 0.022169 0.020510 0.023122
FADC250_SLOT 5
FADC250_ALLCH_GAIN 0.022196 0.021334 0.021754 0.021884 0.023489 0.021914 0.021456 1.000000 0.023157 0.022684 0.022305 0.023568 0.022705 0.023165 0.023263 0.023018
FADC250_SLOT 6
FADC250_ALLCH_GAIN 0.022985 0.022355 0.022867 0.022786 0.022282 0.022651 0.022259 0.021937 0.020773 0.019173 0.023589 0.024607 0.021711 0.024471 0.023099 0.022875
FADC250_SLOT 7
FADC250_ALLCH_GAIN 0.023785 0.021707 0.021596 0.023356 0.022846 0.022160 0.207583 0.023119 0.021707 0.021707 0.017652 0.024443 0.017562 0.138412 0.022796 0.024265
FADC250_SLOT 8
FADC250_ALLCH_GAIN 0.021705 0.022364 0.023732 0.022849 0.022702 0.023959 0.022989 0.022551 0.022568 0.021385 0.024401 0.023506 0.020734 0.020240 0.020795 0.022889
FADC250_SLOT 9
FADC250_ALLCH_GAIN 0.037914 0.023404 0.023380 0.022282 0.021788 0.022597 0.021841 0.023133 0.019916 0.157940 0.021449 0.021201 0.021939 0.022380 0.020708 0.024183
FADC250_SLOT 10
FADC250_ALLCH_GAIN 0.022436 0.021799 0.022137 0.022749 0.021707 0.021707 0.021506 0.022274 0.020907 0.022439 0.020534 0.022930 0.021707 0.016667 0.023006 0.024061
FADC250_SLOT 13
FADC250_ALLCH_GAIN 0.023264 0.021667 0.024180 0.023639 0.023482 0.023720 0.024256 0.024193 0.024895 0.021293 0.021707 0.024084 0.019876 0.019823 0.023165 0.023654
FADC250_SLOT 14
FADC250_ALLCH_GAIN 0.021919 0.023190 0.022757 0.020292 0.022986 0.024182 0.022787 0.021509 0.021707 0.021707 0.022943 0.023159 0.023820 0.024772 0.022138 0.022576
FADC250_SLOT 15
FADC250_ALLCH_GAIN 0.023334 0.021536 0.023113 0.018226 0.022598 0.023479 0.022112 0.021322 0.024380 0.023157 0.023504 0.025100 0.021707 0.022105 0.022110 0.021539
FADC250_SLOT 16
FADC250_ALLCH_GAIN 0.021802 0.022868 0.022452 0.022596 0.022929 0.022755 0.022828 0.023023 0.023895 0.023158 0.023581 0.024050 0.021750 0.022607 0.022751 0.023053
FADC250_SLOT 17
FADC250_ALLCH_GAIN 0.023313 0.023266 0.022481 0.022948 0.021831 0.021042 0.022127 0.022932 0.020290 0.019909 0.022943 0.022324 0.020438 0.022403 0.022903 0.023821
FADC250_SLOT 18
FADC250_ALLCH_GAIN 0.023440 0.023266 0.022693 0.021774 0.022417 0.023344 0.023297 0.022827 0.022569 0.019709 0.019728 0.017390 0.022395 0.020371 0.022648 0.022916
FADC250_SLOT 19
FADC250_ALLCH_GAIN 1.000000 0.022777 1.000000 0.022247 0.021793 1.000000 0.022699 1.000000 1.000000 0.021036 1.000000 0.021124 0.019249 1.000000 0.021968 1.000000
FADC250_CRATE end
#SVT
# include trigger/SVT/svt_prod.trg
# SVT thresholds
VSCM_CRATE svt1
VSCM_SLOT 3
# include trigger/SVT/high_thresholds.cnf
# Set discriminators on U3,U4 FSSR2 chips
FSSR_ADDR_REG_DISC_THR 2 0 38
FSSR_ADDR_REG_DISC_THR 3 0 38
FSSR_ADDR_REG_DISC_THR 6 0 38
FSSR_ADDR_REG_DISC_THR 7 0 38
FSSR_ADDR_REG_DISC_THR 2 1 50
FSSR_ADDR_REG_DISC_THR 3 1 50
FSSR_ADDR_REG_DISC_THR 6 1 50
FSSR_ADDR_REG_DISC_THR 7 1 50
FSSR_ADDR_REG_DISC_THR 2 2 65
FSSR_ADDR_REG_DISC_THR 3 2 65
FSSR_ADDR_REG_DISC_THR 6 2 65
FSSR_ADDR_REG_DISC_THR 7 2 65
FSSR_ADDR_REG_DISC_THR 2 3 80
FSSR_ADDR_REG_DISC_THR 3 3 80
FSSR_ADDR_REG_DISC_THR 6 3 80
FSSR_ADDR_REG_DISC_THR 7 3 80
FSSR_ADDR_REG_DISC_THR 2 4 95
FSSR_ADDR_REG_DISC_THR 3 4 95
FSSR_ADDR_REG_DISC_THR 6 4 95
FSSR_ADDR_REG_DISC_THR 7 4 95
FSSR_ADDR_REG_DISC_THR 2 5 110
FSSR_ADDR_REG_DISC_THR 3 5 110
FSSR_ADDR_REG_DISC_THR 6 5 110
FSSR_ADDR_REG_DISC_THR 7 5 110
FSSR_ADDR_REG_DISC_THR 2 6 125
FSSR_ADDR_REG_DISC_THR 3 6 125
FSSR_ADDR_REG_DISC_THR 6 6 125
FSSR_ADDR_REG_DISC_THR 7 6 125
FSSR_ADDR_REG_DISC_THR 2 7 140
FSSR_ADDR_REG_DISC_THR 3 7 140
FSSR_ADDR_REG_DISC_THR 6 7 140
FSSR_ADDR_REG_DISC_THR 7 7 140
VSCM_SLOT 3
# include trigger/SVT/high_thresholds_r1s2.cnf
# Set discriminators on FSSR2 chips
FSSR_ADDR_REG_DISC_THR 6 0 40
FSSR_ADDR_REG_DISC_THR 7 0 40
FSSR_ADDR_REG_DISC_THR 6 1 50
FSSR_ADDR_REG_DISC_THR 7 1 50
FSSR_ADDR_REG_DISC_THR 6 2 65
FSSR_ADDR_REG_DISC_THR 7 2 65
FSSR_ADDR_REG_DISC_THR 6 3 80
FSSR_ADDR_REG_DISC_THR 7 3 80
FSSR_ADDR_REG_DISC_THR 6 4 95
FSSR_ADDR_REG_DISC_THR 7 4 95
FSSR_ADDR_REG_DISC_THR 6 5 110
FSSR_ADDR_REG_DISC_THR 7 5 110
FSSR_ADDR_REG_DISC_THR 6 6 125
FSSR_ADDR_REG_DISC_THR 7 6 125
FSSR_ADDR_REG_DISC_THR 6 7 140
FSSR_ADDR_REG_DISC_THR 7 7 140
VSCM_SLOT 4
# include trigger/SVT/high_thresholds.cnf
# Set discriminators on U3,U4 FSSR2 chips
FSSR_ADDR_REG_DISC_THR 2 0 38
FSSR_ADDR_REG_DISC_THR 3 0 38
FSSR_ADDR_REG_DISC_THR 6 0 38
FSSR_ADDR_REG_DISC_THR 7 0 38
FSSR_ADDR_REG_DISC_THR 2 1 50
FSSR_ADDR_REG_DISC_THR 3 1 50
FSSR_ADDR_REG_DISC_THR 6 1 50
FSSR_ADDR_REG_DISC_THR 7 1 50
FSSR_ADDR_REG_DISC_THR 2 2 65
FSSR_ADDR_REG_DISC_THR 3 2 65
FSSR_ADDR_REG_DISC_THR 6 2 65
FSSR_ADDR_REG_DISC_THR 7 2 65
FSSR_ADDR_REG_DISC_THR 2 3 80
FSSR_ADDR_REG_DISC_THR 3 3 80
FSSR_ADDR_REG_DISC_THR 6 3 80
FSSR_ADDR_REG_DISC_THR 7 3 80
FSSR_ADDR_REG_DISC_THR 2 4 95
FSSR_ADDR_REG_DISC_THR 3 4 95
FSSR_ADDR_REG_DISC_THR 6 4 95
FSSR_ADDR_REG_DISC_THR 7 4 95
FSSR_ADDR_REG_DISC_THR 2 5 110
FSSR_ADDR_REG_DISC_THR 3 5 110
FSSR_ADDR_REG_DISC_THR 6 5 110
FSSR_ADDR_REG_DISC_THR 7 5 110
FSSR_ADDR_REG_DISC_THR 2 6 125
FSSR_ADDR_REG_DISC_THR 3 6 125
FSSR_ADDR_REG_DISC_THR 6 6 125
FSSR_ADDR_REG_DISC_THR 7 6 125
FSSR_ADDR_REG_DISC_THR 2 7 140
FSSR_ADDR_REG_DISC_THR 3 7 140
FSSR_ADDR_REG_DISC_THR 6 7 140
FSSR_ADDR_REG_DISC_THR 7 7 140
VSCM_SLOT 5
# include trigger/SVT/high_thresholds.cnf
# Set discriminators on U3,U4 FSSR2 chips
FSSR_ADDR_REG_DISC_THR 2 0 38
FSSR_ADDR_REG_DISC_THR 3 0 38
FSSR_ADDR_REG_DISC_THR 6 0 38
FSSR_ADDR_REG_DISC_THR 7 0 38
FSSR_ADDR_REG_DISC_THR 2 1 50
FSSR_ADDR_REG_DISC_THR 3 1 50
FSSR_ADDR_REG_DISC_THR 6 1 50
FSSR_ADDR_REG_DISC_THR 7 1 50
FSSR_ADDR_REG_DISC_THR 2 2 65
FSSR_ADDR_REG_DISC_THR 3 2 65
FSSR_ADDR_REG_DISC_THR 6 2 65
FSSR_ADDR_REG_DISC_THR 7 2 65
FSSR_ADDR_REG_DISC_THR 2 3 80
FSSR_ADDR_REG_DISC_THR 3 3 80
FSSR_ADDR_REG_DISC_THR 6 3 80
FSSR_ADDR_REG_DISC_THR 7 3 80
FSSR_ADDR_REG_DISC_THR 2 4 95
FSSR_ADDR_REG_DISC_THR 3 4 95
FSSR_ADDR_REG_DISC_THR 6 4 95
FSSR_ADDR_REG_DISC_THR 7 4 95
FSSR_ADDR_REG_DISC_THR 2 5 110
FSSR_ADDR_REG_DISC_THR 3 5 110
FSSR_ADDR_REG_DISC_THR 6 5 110
FSSR_ADDR_REG_DISC_THR 7 5 110
FSSR_ADDR_REG_DISC_THR 2 6 125
FSSR_ADDR_REG_DISC_THR 3 6 125
FSSR_ADDR_REG_DISC_THR 6 6 125
FSSR_ADDR_REG_DISC_THR 7 6 125
FSSR_ADDR_REG_DISC_THR 2 7 140
FSSR_ADDR_REG_DISC_THR 3 7 140
FSSR_ADDR_REG_DISC_THR 6 7 140
FSSR_ADDR_REG_DISC_THR 7 7 140
VSCM_SLOT 7
#R2S1B
# include trigger/SVT/high_thresholds_c1_bottom_r2s1b.cnf
# Set discriminators on FSSR2 chips
FSSR_ADDR_REG_DISC_THR 2 0 35
FSSR_ADDR_REG_DISC_THR 3 0 35
FSSR_ADDR_REG_DISC_THR 2 1 50
FSSR_ADDR_REG_DISC_THR 3 1 50
FSSR_ADDR_REG_DISC_THR 2 2 65
FSSR_ADDR_REG_DISC_THR 3 2 65
FSSR_ADDR_REG_DISC_THR 2 3 80
FSSR_ADDR_REG_DISC_THR 3 3 80
FSSR_ADDR_REG_DISC_THR 2 4 95
FSSR_ADDR_REG_DISC_THR 3 4 95
FSSR_ADDR_REG_DISC_THR 2 5 110
FSSR_ADDR_REG_DISC_THR 3 5 110
FSSR_ADDR_REG_DISC_THR 2 6 125
FSSR_ADDR_REG_DISC_THR 3 6 125
FSSR_ADDR_REG_DISC_THR 2 7 140
FSSR_ADDR_REG_DISC_THR 3 7 140
VSCM_SLOT 8
#R2S3B
# include trigger/SVT/high_thresholds_c1_bottom_r2s3b.cnf
# Set discriminators on FSSR2 chips
FSSR_ADDR_REG_DISC_THR 2 0 35
FSSR_ADDR_REG_DISC_THR 3 0 35
FSSR_ADDR_REG_DISC_THR 2 1 50
FSSR_ADDR_REG_DISC_THR 3 1 50
FSSR_ADDR_REG_DISC_THR 2 2 65
FSSR_ADDR_REG_DISC_THR 3 2 65
FSSR_ADDR_REG_DISC_THR 2 3 80
FSSR_ADDR_REG_DISC_THR 3 3 80
FSSR_ADDR_REG_DISC_THR 2 4 95
FSSR_ADDR_REG_DISC_THR 3 4 95
FSSR_ADDR_REG_DISC_THR 2 5 110
FSSR_ADDR_REG_DISC_THR 3 5 110
FSSR_ADDR_REG_DISC_THR 2 6 125
FSSR_ADDR_REG_DISC_THR 3 6 125
FSSR_ADDR_REG_DISC_THR 2 7 140
FSSR_ADDR_REG_DISC_THR 3 7 140
# include trigger/SVT/killmask_svt1.cnf
# FSSR_ADDR_REG_KILL_STRIP <chip 0-7> <strip 0-127>
VSCM_CRATE svt1
VSCM_SLOT 7
#R2S1B
FSSR_ADDR_REG_KILL_STRIP 2 68
FSSR_ADDR_REG_KILL_STRIP 2 69
FSSR_ADDR_REG_KILL_STRIP 2 70
FSSR_ADDR_REG_KILL_STRIP 2 71
VSCM_SLOT 8
#R2S3B
FSSR_ADDR_REG_KILL_STRIP 3 8
FSSR_ADDR_REG_KILL_STRIP 3 9
FSSR_ADDR_REG_KILL_STRIP 3 10
FSSR_ADDR_REG_KILL_STRIP 3 11
VSCM_SLOT 17
#R3S18B
FSSR_ADDR_REG_KILL_STRIP 3 2
VSCM_CRATE end
VSCM_CRATE end
VSCM_CRATE svt2
VSCM_SLOT 3
# include trigger/SVT/high_thresholds.cnf
# Set discriminators on U3,U4 FSSR2 chips
FSSR_ADDR_REG_DISC_THR 2 0 38
FSSR_ADDR_REG_DISC_THR 3 0 38
FSSR_ADDR_REG_DISC_THR 6 0 38
FSSR_ADDR_REG_DISC_THR 7 0 38
FSSR_ADDR_REG_DISC_THR 2 1 50
FSSR_ADDR_REG_DISC_THR 3 1 50
FSSR_ADDR_REG_DISC_THR 6 1 50
FSSR_ADDR_REG_DISC_THR 7 1 50
FSSR_ADDR_REG_DISC_THR 2 2 65
FSSR_ADDR_REG_DISC_THR 3 2 65
FSSR_ADDR_REG_DISC_THR 6 2 65
FSSR_ADDR_REG_DISC_THR 7 2 65
FSSR_ADDR_REG_DISC_THR 2 3 80
FSSR_ADDR_REG_DISC_THR 3 3 80
FSSR_ADDR_REG_DISC_THR 6 3 80
FSSR_ADDR_REG_DISC_THR 7 3 80
FSSR_ADDR_REG_DISC_THR 2 4 95
FSSR_ADDR_REG_DISC_THR 3 4 95
FSSR_ADDR_REG_DISC_THR 6 4 95
FSSR_ADDR_REG_DISC_THR 7 4 95
FSSR_ADDR_REG_DISC_THR 2 5 110
FSSR_ADDR_REG_DISC_THR 3 5 110
FSSR_ADDR_REG_DISC_THR 6 5 110
FSSR_ADDR_REG_DISC_THR 7 5 110
FSSR_ADDR_REG_DISC_THR 2 6 125
FSSR_ADDR_REG_DISC_THR 3 6 125
FSSR_ADDR_REG_DISC_THR 6 6 125
FSSR_ADDR_REG_DISC_THR 7 6 125
FSSR_ADDR_REG_DISC_THR 2 7 140
FSSR_ADDR_REG_DISC_THR 3 7 140
FSSR_ADDR_REG_DISC_THR 6 7 140
FSSR_ADDR_REG_DISC_THR 7 7 140
VSCM_SLOT 4
# include trigger/SVT/high_thresholds.cnf
# Set discriminators on U3,U4 FSSR2 chips
FSSR_ADDR_REG_DISC_THR 2 0 38
FSSR_ADDR_REG_DISC_THR 3 0 38
FSSR_ADDR_REG_DISC_THR 6 0 38
FSSR_ADDR_REG_DISC_THR 7 0 38
FSSR_ADDR_REG_DISC_THR 2 1 50
FSSR_ADDR_REG_DISC_THR 3 1 50
FSSR_ADDR_REG_DISC_THR 6 1 50
FSSR_ADDR_REG_DISC_THR 7 1 50
FSSR_ADDR_REG_DISC_THR 2 2 65
FSSR_ADDR_REG_DISC_THR 3 2 65
FSSR_ADDR_REG_DISC_THR 6 2 65
FSSR_ADDR_REG_DISC_THR 7 2 65
FSSR_ADDR_REG_DISC_THR 2 3 80
FSSR_ADDR_REG_DISC_THR 3 3 80
FSSR_ADDR_REG_DISC_THR 6 3 80
FSSR_ADDR_REG_DISC_THR 7 3 80
FSSR_ADDR_REG_DISC_THR 2 4 95
FSSR_ADDR_REG_DISC_THR 3 4 95
FSSR_ADDR_REG_DISC_THR 6 4 95
FSSR_ADDR_REG_DISC_THR 7 4 95
FSSR_ADDR_REG_DISC_THR 2 5 110
FSSR_ADDR_REG_DISC_THR 3 5 110
FSSR_ADDR_REG_DISC_THR 6 5 110
FSSR_ADDR_REG_DISC_THR 7 5 110
FSSR_ADDR_REG_DISC_THR 2 6 125
FSSR_ADDR_REG_DISC_THR 3 6 125
FSSR_ADDR_REG_DISC_THR 6 6 125
FSSR_ADDR_REG_DISC_THR 7 6 125
FSSR_ADDR_REG_DISC_THR 2 7 140
FSSR_ADDR_REG_DISC_THR 3 7 140
FSSR_ADDR_REG_DISC_THR 6 7 140
FSSR_ADDR_REG_DISC_THR 7 7 140
VSCM_SLOT 5
# include trigger/SVT/high_thresholds.cnf
# Set discriminators on U3,U4 FSSR2 chips
FSSR_ADDR_REG_DISC_THR 2 0 38
FSSR_ADDR_REG_DISC_THR 3 0 38
FSSR_ADDR_REG_DISC_THR 6 0 38
FSSR_ADDR_REG_DISC_THR 7 0 38
FSSR_ADDR_REG_DISC_THR 2 1 50
FSSR_ADDR_REG_DISC_THR 3 1 50
FSSR_ADDR_REG_DISC_THR 6 1 50
FSSR_ADDR_REG_DISC_THR 7 1 50
FSSR_ADDR_REG_DISC_THR 2 2 65
FSSR_ADDR_REG_DISC_THR 3 2 65
FSSR_ADDR_REG_DISC_THR 6 2 65
FSSR_ADDR_REG_DISC_THR 7 2 65
FSSR_ADDR_REG_DISC_THR 2 3 80
FSSR_ADDR_REG_DISC_THR 3 3 80
FSSR_ADDR_REG_DISC_THR 6 3 80
FSSR_ADDR_REG_DISC_THR 7 3 80
FSSR_ADDR_REG_DISC_THR 2 4 95
FSSR_ADDR_REG_DISC_THR 3 4 95
FSSR_ADDR_REG_DISC_THR 6 4 95
FSSR_ADDR_REG_DISC_THR 7 4 95
FSSR_ADDR_REG_DISC_THR 2 5 110
FSSR_ADDR_REG_DISC_THR 3 5 110
FSSR_ADDR_REG_DISC_THR 6 5 110
FSSR_ADDR_REG_DISC_THR 7 5 110
FSSR_ADDR_REG_DISC_THR 2 6 125
FSSR_ADDR_REG_DISC_THR 3 6 125
FSSR_ADDR_REG_DISC_THR 6 6 125
FSSR_ADDR_REG_DISC_THR 7 6 125
FSSR_ADDR_REG_DISC_THR 2 7 140
FSSR_ADDR_REG_DISC_THR 3 7 140
FSSR_ADDR_REG_DISC_THR 6 7 140
FSSR_ADDR_REG_DISC_THR 7 7 140
VSCM_SLOT 7
#R2S5B
# include trigger/SVT/high_thresholds_c1_bottom_r2s5b.cnf
# Set discriminators on FSSR2 chips
FSSR_ADDR_REG_DISC_THR 2 0 35
FSSR_ADDR_REG_DISC_THR 3 0 35
FSSR_ADDR_REG_DISC_THR 2 1 50
FSSR_ADDR_REG_DISC_THR 3 1 50
FSSR_ADDR_REG_DISC_THR 2 2 65
FSSR_ADDR_REG_DISC_THR 3 2 65
FSSR_ADDR_REG_DISC_THR 2 3 80
FSSR_ADDR_REG_DISC_THR 3 3 80
FSSR_ADDR_REG_DISC_THR 2 4 95
FSSR_ADDR_REG_DISC_THR 3 4 95
FSSR_ADDR_REG_DISC_THR 2 5 110
FSSR_ADDR_REG_DISC_THR 3 5 110
FSSR_ADDR_REG_DISC_THR 2 6 125
FSSR_ADDR_REG_DISC_THR 3 6 125
FSSR_ADDR_REG_DISC_THR 2 7 140
FSSR_ADDR_REG_DISC_THR 3 7 140
VSCM_SLOT 9
#R2S10T
# include trigger/SVT/high_thresholds_c2_top_r2s10t.cnf
# Set discriminators on FSSR2 chips
FSSR_ADDR_REG_DISC_THR 4 0 35
FSSR_ADDR_REG_DISC_THR 5 0 35
FSSR_ADDR_REG_DISC_THR 4 1 50
FSSR_ADDR_REG_DISC_THR 5 1 50
FSSR_ADDR_REG_DISC_THR 4 2 65
FSSR_ADDR_REG_DISC_THR 5 2 65
FSSR_ADDR_REG_DISC_THR 4 3 80
FSSR_ADDR_REG_DISC_THR 5 3 80
FSSR_ADDR_REG_DISC_THR 4 4 95
FSSR_ADDR_REG_DISC_THR 5 4 95
FSSR_ADDR_REG_DISC_THR 4 5 110
FSSR_ADDR_REG_DISC_THR 5 5 110
FSSR_ADDR_REG_DISC_THR 4 6 125
FSSR_ADDR_REG_DISC_THR 5 6 125
FSSR_ADDR_REG_DISC_THR 4 7 140
FSSR_ADDR_REG_DISC_THR 5 7 140
#include trigger/SVT/killmask_r2s10t.cnf
# include trigger/SVT/killmask_svt2.cnf
VSCM_CRATE svt2
VSCM_SLOT 9
# FSSR_ADDR_REG_KILL_STRIP <chip 0-7> <strip 0-127>
#R2S10T
FSSR_ADDR_REG_KILL_STRIP 4 36
FSSR_ADDR_REG_KILL_STRIP 4 37
FSSR_ADDR_REG_KILL_STRIP 4 38
FSSR_ADDR_REG_KILL_STRIP 4 39
VSCM_SLOT 7
#R2S5B
FSSR_ADDR_REG_KILL_STRIP 2 109
FSSR_ADDR_REG_KILL_STRIP 2 110
FSSR_ADDR_REG_KILL_STRIP 2 111
FSSR_ADDR_REG_KILL_STRIP 2 112
VSCM_CRATE end
VSCM_CRATE end
#include trigger/SVT/killmask.cnf
#######################################
# Trigger stage 1 (crates with FADCs) #
#######################################
# ECAL
VTP_CRATE adcecal1vtp
# include trigger/VTP/ecalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# slot: 3 4 5 6 7 8 9 10 13 14 15 16 17 18 19 20
VTP_ECS_FADCSUM_CH 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0x0000 0x0000
#VTP_ECS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
###VTP_ECS_THRESHOLDS 50 80 150
VTP_ECS_THRESHOLDS 9 20 100
VTP_ECS_NFRAMES 3
VTP_ECS_DIPFACTOR 1
VTP_ECS_NSTRIP 0 0
VTP_ECS_DALITZ 69 74
#70-73
VTP_ECS_INNER_COSMIC_EMIN 50
VTP_ECS_INNER_COSMIC_MULTMAX 1
VTP_ECS_INNER_COSMIC_HITWIDTH 64
VTP_ECS_INNER_COSMIC_EVALDELAY 32
VTP_ECS_OUTER_COSMIC_EMIN 100
VTP_ECS_OUTER_COSMIC_MULTMAX 1
VTP_ECS_OUTER_COSMIC_HITWIDTH 64
VTP_ECS_OUTER_COSMIC_EVALDELAY 32
VTP_CRATE end
VTP_CRATE adcecal2vtp
# include trigger/VTP/ecalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# slot: 3 4 5 6 7 8 9 10 13 14 15 16 17 18 19 20
VTP_ECS_FADCSUM_CH 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0x0000 0x0000
#VTP_ECS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
###VTP_ECS_THRESHOLDS 50 80 150
VTP_ECS_THRESHOLDS 9 20 100
VTP_ECS_NFRAMES 3
VTP_ECS_DIPFACTOR 1
VTP_ECS_NSTRIP 0 0
VTP_ECS_DALITZ 69 74
#70-73
VTP_ECS_INNER_COSMIC_EMIN 50
VTP_ECS_INNER_COSMIC_MULTMAX 1
VTP_ECS_INNER_COSMIC_HITWIDTH 64
VTP_ECS_INNER_COSMIC_EVALDELAY 32
VTP_ECS_OUTER_COSMIC_EMIN 100
VTP_ECS_OUTER_COSMIC_MULTMAX 1
VTP_ECS_OUTER_COSMIC_HITWIDTH 64
VTP_ECS_OUTER_COSMIC_EVALDELAY 32
VTP_CRATE end
VTP_CRATE adcecal3vtp
# include trigger/VTP/ecalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# slot: 3 4 5 6 7 8 9 10 13 14 15 16 17 18 19 20
VTP_ECS_FADCSUM_CH 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0x0000 0x0000
#VTP_ECS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
###VTP_ECS_THRESHOLDS 50 80 150
VTP_ECS_THRESHOLDS 9 20 100
VTP_ECS_NFRAMES 3
VTP_ECS_DIPFACTOR 1
VTP_ECS_NSTRIP 0 0
VTP_ECS_DALITZ 69 74
#70-73
VTP_ECS_INNER_COSMIC_EMIN 50
VTP_ECS_INNER_COSMIC_MULTMAX 1
VTP_ECS_INNER_COSMIC_HITWIDTH 64
VTP_ECS_INNER_COSMIC_EVALDELAY 32
VTP_ECS_OUTER_COSMIC_EMIN 100
VTP_ECS_OUTER_COSMIC_MULTMAX 1
VTP_ECS_OUTER_COSMIC_HITWIDTH 64
VTP_ECS_OUTER_COSMIC_EVALDELAY 32
VTP_CRATE end
VTP_CRATE adcecal4vtp
# include trigger/VTP/ecalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# slot: 3 4 5 6 7 8 9 10 13 14 15 16 17 18 19 20
VTP_ECS_FADCSUM_CH 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0x0000 0x0000
#VTP_ECS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
###VTP_ECS_THRESHOLDS 50 80 150
VTP_ECS_THRESHOLDS 9 20 100
VTP_ECS_NFRAMES 3
VTP_ECS_DIPFACTOR 1
VTP_ECS_NSTRIP 0 0
VTP_ECS_DALITZ 69 74
#70-73
VTP_ECS_INNER_COSMIC_EMIN 50
VTP_ECS_INNER_COSMIC_MULTMAX 1
VTP_ECS_INNER_COSMIC_HITWIDTH 64
VTP_ECS_INNER_COSMIC_EVALDELAY 32
VTP_ECS_OUTER_COSMIC_EMIN 100
VTP_ECS_OUTER_COSMIC_MULTMAX 1
VTP_ECS_OUTER_COSMIC_HITWIDTH 64
VTP_ECS_OUTER_COSMIC_EVALDELAY 32
VTP_CRATE end
VTP_CRATE adcecal5vtp
# include trigger/VTP/ecalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# slot: 3 4 5 6 7 8 9 10 13 14 15 16 17 18 19 20
VTP_ECS_FADCSUM_CH 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0x0000 0x0000
#VTP_ECS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
###VTP_ECS_THRESHOLDS 50 80 150
VTP_ECS_THRESHOLDS 9 20 100
VTP_ECS_NFRAMES 3
VTP_ECS_DIPFACTOR 1
VTP_ECS_NSTRIP 0 0
VTP_ECS_DALITZ 69 74
#70-73
VTP_ECS_INNER_COSMIC_EMIN 50
VTP_ECS_INNER_COSMIC_MULTMAX 1
VTP_ECS_INNER_COSMIC_HITWIDTH 64
VTP_ECS_INNER_COSMIC_EVALDELAY 32
VTP_ECS_OUTER_COSMIC_EMIN 100
VTP_ECS_OUTER_COSMIC_MULTMAX 1
VTP_ECS_OUTER_COSMIC_HITWIDTH 64
VTP_ECS_OUTER_COSMIC_EVALDELAY 32
VTP_CRATE end
VTP_CRATE adcecal6vtp
# include trigger/VTP/ecalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# slot: 3 4 5 6 7 8 9 10 13 14 15 16 17 18 19 20
VTP_ECS_FADCSUM_CH 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0xFFFF 0x0FFF 0x0000 0x0000
#VTP_ECS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
###VTP_ECS_THRESHOLDS 50 80 150
VTP_ECS_THRESHOLDS 9 20 100
VTP_ECS_NFRAMES 3
VTP_ECS_DIPFACTOR 1
VTP_ECS_NSTRIP 0 0
VTP_ECS_DALITZ 69 74
#70-73
VTP_ECS_INNER_COSMIC_EMIN 50
VTP_ECS_INNER_COSMIC_MULTMAX 1
VTP_ECS_INNER_COSMIC_HITWIDTH 64
VTP_ECS_INNER_COSMIC_EVALDELAY 32
VTP_ECS_OUTER_COSMIC_EMIN 100
VTP_ECS_OUTER_COSMIC_MULTMAX 1
VTP_ECS_OUTER_COSMIC_HITWIDTH 64
VTP_ECS_OUTER_COSMIC_EVALDELAY 32
VTP_CRATE end
# PCAL
VTP_CRATE adcpcal1vtp
# include trigger/VTP/pcalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
#VTP_PCS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
##VTP_PCS_THRESHOLDS 50 80 150
###VTP_PCS_THRESHOLDS 20 40 150
VTP_PCS_THRESHOLDS 10 18 100
VTP_PCS_NFRAMES 3
VTP_PCS_DIPFACTOR 1
VTP_PCS_NSTRIP 0 0
VTP_PCS_DALITZ 400 520
#around 462
# include trigger/VTP/pcuvtp_default.cnf
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
VTP_PCU_THRESHOLDS 10 10 8000
VTP_CRATE end
VTP_CRATE adcpcal2vtp
# include trigger/VTP/pcalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
#VTP_PCS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
##VTP_PCS_THRESHOLDS 50 80 150
###VTP_PCS_THRESHOLDS 20 40 150
VTP_PCS_THRESHOLDS 10 18 100
VTP_PCS_NFRAMES 3
VTP_PCS_DIPFACTOR 1
VTP_PCS_NSTRIP 0 0
VTP_PCS_DALITZ 400 520
#around 462
# include trigger/VTP/pcuvtp_default.cnf
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
VTP_PCU_THRESHOLDS 10 10 8000
VTP_CRATE end
VTP_CRATE adcpcal3vtp
# include trigger/VTP/pcalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
#VTP_PCS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
##VTP_PCS_THRESHOLDS 50 80 150
###VTP_PCS_THRESHOLDS 20 40 150
VTP_PCS_THRESHOLDS 10 18 100
VTP_PCS_NFRAMES 3
VTP_PCS_DIPFACTOR 1
VTP_PCS_NSTRIP 0 0
VTP_PCS_DALITZ 400 520
#around 462
# include trigger/VTP/pcuvtp_default.cnf
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
VTP_PCU_THRESHOLDS 10 10 8000
VTP_CRATE end
VTP_CRATE adcpcal4vtp
# include trigger/VTP/pcalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
#VTP_PCS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
##VTP_PCS_THRESHOLDS 50 80 150
###VTP_PCS_THRESHOLDS 20 40 150
VTP_PCS_THRESHOLDS 10 18 100
VTP_PCS_NFRAMES 3
VTP_PCS_DIPFACTOR 1
VTP_PCS_NSTRIP 0 0
VTP_PCS_DALITZ 400 520
#around 462
# include trigger/VTP/pcuvtp_default.cnf
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
VTP_PCU_THRESHOLDS 10 10 8000
VTP_CRATE end
VTP_CRATE adcpcal5vtp
# include trigger/VTP/pcalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
#VTP_PCS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
##VTP_PCS_THRESHOLDS 50 80 150
###VTP_PCS_THRESHOLDS 20 40 150
VTP_PCS_THRESHOLDS 10 18 100
VTP_PCS_NFRAMES 3
VTP_PCS_DIPFACTOR 1
VTP_PCS_NSTRIP 0 0
VTP_PCS_DALITZ 400 520
#around 462
# include trigger/VTP/pcuvtp_default.cnf
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
VTP_PCU_THRESHOLDS 10 10 8000
VTP_CRATE end
VTP_CRATE adcpcal6vtp
# include trigger/VTP/pcalvtp_low_thres.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
#VTP_PCS_THRESHOLDS <Strip> <Peak> <Cluster>
#Units: 1/10MeV = 100 keV 10=1 MeV
##VTP_PCS_THRESHOLDS 50 80 150
###VTP_PCS_THRESHOLDS 20 40 150
VTP_PCS_THRESHOLDS 10 18 100
VTP_PCS_NFRAMES 3
VTP_PCS_DIPFACTOR 1
VTP_PCS_NSTRIP 0 0
VTP_PCS_DALITZ 400 520
#around 462
# include trigger/VTP/pcuvtp_default.cnf
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
VTP_PCU_THRESHOLDS 10 10 8000
VTP_CRATE end
#
# HTCC
#
VTP_CRATE adcctof1vtp
# include trigger/VTP/htcc_prod_2phe.cnf
# Unit: 1/10 Phe 1 = 0.1phe
#
# strip mult cluster
# | | |
###VTP_HTCC_THRESHOLDS 1 0 30
###VTP_HTCC_THRESHOLDS 1 0 5
VTP_HTCC_THRESHOLDS 1 0 20
# VTP_HTCC_NFRAMES 0=4ns, 1=8ns, 2=12ns, 3=16ns coincidence
VTP_HTCC_NFRAMES 3
VTP_CRATE end
#FT (3 VTPs inside the file)
# include trigger/VTP/ftvtp_prod.cnf
#A.C. on 12 dec 2017: created followign file taking what was in ft_selftrigger_VTP.trg
VTP_CRATE adcft1vtp
VTP_FIRMWARE fe_vtp_hallb_v7_ftcal1.bin
#VTP_W_OFFSET 1400
##VTP_W_OFFSET 7900
#VTP_W_OFFSET 7650
VTP_W_OFFSET 7730
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 0 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 1 1 1
# Cluster seed hit minimum energy to form cluster. Units MeV
#VTP_FTCAL_SEED_EMIN 100
VTP_FTCAL_SEED_EMIN 50
# Cluster hit timing coicidence (with respect to seed). Units: +/-Xns
VTP_FTCAL_SEED_DT 16
# Hodo coincidence dt (with respect to seed). Units: +/-Xns
VTP_FTCAL_HODO_DT 16
VTP_CRATE end
VTP_CRATE adcft2vtp
VTP_FIRMWARE fe_vtp_hallb_v7_ftcal2.bin
#VTP_W_OFFSET 1400
##VTP_W_OFFSET 7900
#VTP_W_OFFSET 7650
VTP_W_OFFSET 7730
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 1 1 1
# Cluster seed hit minimum energy to form cluster. Units MeV
#VTP_FTCAL_SEED_EMIN 100
VTP_FTCAL_SEED_EMIN 50
# Cluster hit timing coicidence (with respect to seed). Units: +/-Xns
VTP_FTCAL_SEED_DT 16
# Hodo coincidence dt (with respect to seed). Units: +/-Xns
VTP_FTCAL_HODO_DT 16
VTP_CRATE end
VTP_CRATE adcft3vtp
VTP_FIRMWARE fe_vtp_hallb_v7_fthodo.bin
#VTP_W_OFFSET 1400
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 1 1 1
# Hodoscope minimum hodoscope hit energy
#A.C. 19/2/2018: this is in % with respect to MIP charge. For example, 20 means 20 % of the MIP charge
VTP_FTHODO_EMIN 25
VTP_CRATE end
# FTOF
VTP_CRATE adcftof1vtp
# include trigger/VTP/ftofvtp_prod.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# strip mult cluster
# Unit: 1/10 Phe 1 = 0.1MeV
# strip sqrt n/a
# | | |
VTP_FTOF_THRESHOLDS 20 50 0
# VTP_FTOF_NFRAMES 0=4ns, 1=8ns, 2=12ns, 3=16ns coincidence
VTP_FTOF_NFRAMES 8
VTP_CRATE end
VTP_CRATE adcftof2vtp
# include trigger/VTP/ftofvtp_prod.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# strip mult cluster
# Unit: 1/10 Phe 1 = 0.1MeV
# strip sqrt n/a
# | | |
VTP_FTOF_THRESHOLDS 20 50 0
# VTP_FTOF_NFRAMES 0=4ns, 1=8ns, 2=12ns, 3=16ns coincidence
VTP_FTOF_NFRAMES 8
VTP_CRATE end
VTP_CRATE adcftof3vtp
# include trigger/VTP/ftofvtp_prod.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# strip mult cluster
# Unit: 1/10 Phe 1 = 0.1MeV
# strip sqrt n/a
# | | |
VTP_FTOF_THRESHOLDS 20 50 0
# VTP_FTOF_NFRAMES 0=4ns, 1=8ns, 2=12ns, 3=16ns coincidence
VTP_FTOF_NFRAMES 8
VTP_CRATE end
VTP_CRATE adcftof4vtp
# include trigger/VTP/ftofvtp_prod.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# strip mult cluster
# Unit: 1/10 Phe 1 = 0.1MeV
# strip sqrt n/a
# | | |
VTP_FTOF_THRESHOLDS 20 50 0
# VTP_FTOF_NFRAMES 0=4ns, 1=8ns, 2=12ns, 3=16ns coincidence
VTP_FTOF_NFRAMES 8
VTP_CRATE end
VTP_CRATE adcftof5vtp
# include trigger/VTP/ftofvtp_prod.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# strip mult cluster
# Unit: 1/10 Phe 1 = 0.1MeV
# strip sqrt n/a
# | | |
VTP_FTOF_THRESHOLDS 20 50 0
# VTP_FTOF_NFRAMES 0=4ns, 1=8ns, 2=12ns, 3=16ns coincidence
VTP_FTOF_NFRAMES 8
VTP_CRATE end
VTP_CRATE adcftof6vtp
# include trigger/VTP/ftofvtp_prod.cnf
##VTP_W_OFFSET 7900
VTP_W_OFFSET 7650
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0
# fiber: 1 2 3 4
VTP_FIBER_EN 1 0 0 0
# strip mult cluster
# Unit: 1/10 Phe 1 = 0.1MeV
# strip sqrt n/a
# | | |
VTP_FTOF_THRESHOLDS 20 50 0
# VTP_FTOF_NFRAMES 0=4ns, 1=8ns, 2=12ns, 3=16ns coincidence
VTP_FTOF_NFRAMES 8
VTP_CRATE end
# CTOF
VTP_CRATE adcctof1vtp
# include trigger/VTP/ctofvtp_prod.cnf
# Unit: 1/10 Phe 1 = 0.1MeV
#
# strip sqrt n/a
# | | |
VTP_CTOF_THRESHOLDS 10 30 0
# nframes: 0=4ns, 1=8ns, 2=12ns, 3=16ns coincidence
VTP_CTOF_NFRAMES 8
VTP_CRATE end
# CND
VTP_CRATE adccnd1vtp
# include trigger/VTP/cndvtp_prod.cnf
# Unit: 1/10 Phe 1 = 0.1MeV
#
# strip sqrt n/a
# | | |
VTP_CND_THRESHOLDS 1 0 0
# nframes: 0=4ns, 1=8ns, 2=12ns, 3=16ns coincidence
VTP_CND_NFRAMES 8
VTP_CRATE end
#################################
# Trigger stage 2 (crate trig2) #
#################################
SSP_CRATE trig2
SSP_SLOT all
##SSP_W_OFFSET 7900
SSP_W_OFFSET 7650
SSP_W_WIDTH 400
# 'SSP_GT_' - sectors trigger logic
SSP_GT_LATENCY 5000
#SSP_GT_HTCC_DELAY 140
#SSP_GT_FTOF_DELAY 80
#SSP_GT_ECAL_CLUSTER_DELAY 0
#SSP_GT_PCAL_CLUSTER_DELAY 0
#SSP_GT_CTOF_DELAY 212
#SSP_GT_CND_DELAY 220
#SSP_GT_PCAL_PCU_DELAY 76
SSP_GT_HTCC_DELAY 1164
SSP_GT_ECAL_CLUSTER_DELAY 1024
SSP_GT_PCAL_CLUSTER_DELAY 1024
SSP_GT_CTOF_DELAY 1236
SSP_GT_CND_DELAY 1244
SSP_GT_FTOF_DELAY 1104
SSP_GT_PCAL_PCU_DELAY 1068
# if use this, add 1024 to all above and SSP_GTC_FT_CLUSTER_DELAY below,
# subtract same from VTP_GT_LATENCY and VTP_W_OFFSET
SSP_GT_DC_SEG_DELAY 0
#pcu
SSP_GT_FTOFPCU_FTOF_WIDTH 32
SSP_GT_FTOFPCU_PCU_WIDTH 32
# 'SSP_GT_STRG_' - sector trigger bits - logic inside single sector
########################
#
# Sector Trigger bit 0
#
# DC x HTCC x (PCAL+ECAL)>300MeV x PCAL>60MeV x ECAL>10MeV
########################
SSP_GT_STRG 0
SSP_GT_STRG_EN 1
# HTCC trigger logic
SSP_GT_STRG_HTCC_EN 1
SSP_SLOT 3 # sector 1 SSP
SSP_GT_STRG_HTCC_MASK 0x0000000000FF
SSP_SLOT 4 # sector 2 SSP
SSP_GT_STRG_HTCC_MASK 0x00000000FF00
SSP_SLOT 5 # sector 3 SSP
SSP_GT_STRG_HTCC_MASK 0x000000FF0000
SSP_SLOT 6 # sector 4 SSP
SSP_GT_STRG_HTCC_MASK 0x0000FF000000
SSP_SLOT 7 # sector 5 SSP
SSP_GT_STRG_HTCC_MASK 0x00FF00000000
SSP_SLOT 8 # sector 6 SSP
SSP_GT_STRG_HTCC_MASK 0xFF0000000000
SSP_SLOT all
SSP_GT_STRG_HTCC_WIDTH 0
# PCAL cluster trigger logic
SSP_GT_STRG_PCAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_PCAL_CLUSTER_EMIN 600
SSP_GT_STRG_PCAL_CLUSTER_WIDTH 96
# ECAL cluster trigger logic
SSP_GT_STRG_ECAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_ECAL_CLUSTER_EMIN 100
SSP_GT_STRG_ECAL_CLUSTER_WIDTH 96
# PCAL+ECAL cluster trigger logic: EMIN in 0.1MeV units
SSP_GT_STRG_ECALPCAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_ECALPCAL_CLUSTER_EMIN 3000
SSP_GT_STRG_ECALPCAL_CLUSTER_WIDTH 96
# DC
SSP_GT_STRG_DC_MULT_EN 1
SSP_GT_STRG_DC_MULT_MIN 3
SSP_GT_STRG_DC_MULT_WIDTH 32
########################
#
# Sector Trigger bit 1
#
# DC x HTCC x PCAL>300MeV
########################
SSP_GT_STRG 1
SSP_GT_STRG_EN 1
# HTCC trigger logic
SSP_GT_STRG_HTCC_EN 1
SSP_SLOT 3 # sector 1 SSP
SSP_GT_STRG_HTCC_MASK 0x0000000000FF
SSP_SLOT 4 # sector 2 SSP
SSP_GT_STRG_HTCC_MASK 0x00000000FF00
SSP_SLOT 5 # sector 3 SSP
SSP_GT_STRG_HTCC_MASK 0x000000FF0000
SSP_SLOT 6 # sector 4 SSP
SSP_GT_STRG_HTCC_MASK 0x0000FF000000
SSP_SLOT 7 # sector 5 SSP
SSP_GT_STRG_HTCC_MASK 0x00FF00000000
SSP_SLOT 8 # sector 6 SSP
SSP_GT_STRG_HTCC_MASK 0xFF0000000000
SSP_SLOT all
SSP_GT_STRG_HTCC_WIDTH 0
# PCAL cluster trigger logic
SSP_GT_STRG_PCAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_PCAL_CLUSTER_EMIN 3000
SSP_GT_STRG_PCAL_CLUSTER_WIDTH 96
# DC
SSP_GT_STRG_DC_MULT_EN 1
SSP_GT_STRG_DC_MULT_MIN 3
SSP_GT_STRG_DC_MULT_WIDTH 32
########################
#
# Sector Trigger bit 2
#
# DC x FTOFPCU x PCAL>15 MeV
########################
SSP_GT_STRG 2
SSP_GT_STRG_EN 1
# PCU trigger logic
SSP_GT_STRG_FTOFPCU_EN 1
SSP_GT_STRG_FTOFPCU_WIDTH 64
SSP_GT_STRG_FTOFPCU_MATCH_MASK 8
# SSP_GT_STRG_FTOFPCU_MATCH_MASK N
# N: 1 = +/-0 FTOF strip tolerance
# 2 = +/-1 FTOF strip tolerance
# 4 = +/-2 FTOF strip tolerance
# 8 = +/-3 FTOF strip tolerance
# 16 = +/-4 FTOF strip tolerance
# 32 = +/-5 FTOF strip tolerance
# PCAL cluster trigger logic
SSP_GT_STRG_PCAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_PCAL_CLUSTER_EMIN 150
SSP_GT_STRG_PCAL_CLUSTER_WIDTH 96
# DC
SSP_GT_STRG_DC_MULT_EN 1
SSP_GT_STRG_DC_MULT_MIN 3
SSP_GT_STRG_DC_MULT_WIDTH 32
########################
#
# Sector Trigger bit 3
#
# DC x FTOFPCU x PCAL>15 MeV x ECAL>40 MeV
########################
SSP_GT_STRG 3
SSP_GT_STRG_EN 1
# PCU trigger logic
SSP_GT_STRG_FTOFPCU_EN 1
SSP_GT_STRG_FTOFPCU_WIDTH 16
SSP_GT_STRG_FTOFPCU_MATCH_MASK 8
# SSP_GT_STRG_FTOFPCU_MATCH_MASK N
# N: 1 = +/-0 FTOF strip tolerance
# 2 = +/-1 FTOF strip tolerance
# 4 = +/-2 FTOF strip tolerance
# 8 = +/-3 FTOF strip tolerance
# 16 = +/-4 FTOF strip tolerance
# 32 = +/-5 FTOF strip tolerance
# PCAL cluster trigger logic: EMIN in 0.1 MeV units
SSP_GT_STRG_PCAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_PCAL_CLUSTER_EMIN 150
SSP_GT_STRG_PCAL_CLUSTER_EMAX 600
SSP_GT_STRG_PCAL_CLUSTER_WIDTH 96
# ECAL cluster trigger logic: EMIN in 0.1MeV units
SSP_GT_STRG_ECAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_ECAL_CLUSTER_EMIN 400
SSP_GT_STRG_ECAL_CLUSTER_EMAX 1200
SSP_GT_STRG_ECAL_CLUSTER_WIDTH 96
# DC
SSP_GT_STRG_DC_MULT_EN 1
SSP_GT_STRG_DC_MULT_MIN 3
SSP_GT_STRG_DC_MULT_WIDTH 32
########################
#
# Sector Trigger bit 4 #
#
# DC x FTOFPCU x PCAL>15 MeV x CTOF
########################
SSP_GT_STRG 4
SSP_GT_STRG_EN 1
# PCU trigger logic
SSP_GT_STRG_FTOFPCU_EN 1
SSP_GT_STRG_FTOFPCU_WIDTH 64
SSP_GT_STRG_FTOFPCU_MATCH_MASK 8
# SSP_GT_STRG_FTOFPCU_MATCH_MASK N
# N: 1 = +/-0 FTOF strip tolerance
# 2 = +/-1 FTOF strip tolerance
# 4 = +/-2 FTOF strip tolerance
# 8 = +/-3 FTOF strip tolerance
# 16 = +/-4 FTOF strip tolerance
# 32 = +/-5 FTOF strip tolerance
# PCAL cluster trigger logic: EMIN in 0.1MeV units
SSP_GT_STRG_PCAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_PCAL_CLUSTER_EMIN 150
SSP_GT_STRG_PCAL_CLUSTER_WIDTH 96
# CTOF logic
SSP_GT_STRG_CTOF_EN 1
SSP_GT_STRG_CTOF_WIDTH 64
SSP_GT_STRG_CTOF_MASK 0xFF
# DC
SSP_GT_STRG_DC_MULT_EN 1
SSP_GT_STRG_DC_MULT_MIN 3
SSP_GT_STRG_DC_MULT_WIDTH 32
########################
#
# Sector Trigger bit 5
#
# HTCC x (PCAL+ECAL)>300MeV x PCAL>60MeV x ECAL>10MeV
########################
SSP_GT_STRG 5
SSP_GT_STRG_EN 1
# HTCC trigger logic
SSP_GT_STRG_HTCC_EN 1
SSP_SLOT 3 # sector 1 SSP
SSP_GT_STRG_HTCC_MASK 0x0000000000FF
SSP_SLOT 4 # sector 2 SSP
SSP_GT_STRG_HTCC_MASK 0x00000000FF00
SSP_SLOT 5 # sector 3 SSP
SSP_GT_STRG_HTCC_MASK 0x000000FF0000
SSP_SLOT 6 # sector 4 SSP
SSP_GT_STRG_HTCC_MASK 0x0000FF000000
SSP_SLOT 7 # sector 5 SSP
SSP_GT_STRG_HTCC_MASK 0x00FF00000000
SSP_SLOT 8 # sector 6 SSP
SSP_GT_STRG_HTCC_MASK 0xFF0000000000
SSP_SLOT all
SSP_GT_STRG_HTCC_WIDTH 0
# PCAL cluster trigger logic
SSP_GT_STRG_PCAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_PCAL_CLUSTER_EMIN 600
SSP_GT_STRG_PCAL_CLUSTER_WIDTH 96
# ECAL cluster trigger logic
SSP_GT_STRG_ECAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_ECAL_CLUSTER_EMIN 100
SSP_GT_STRG_ECAL_CLUSTER_WIDTH 96
# PCAL+ECAL cluster trigger logic: EMIN in 0.1MeV units
SSP_GT_STRG_ECALPCAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_ECALPCAL_CLUSTER_EMIN 3000
SSP_GT_STRG_ECALPCAL_CLUSTER_WIDTH 96
########################
#
# Sector Trigger bit 6
#
# HTCC x PCAL>300MeV
########################
SSP_GT_STRG 6
SSP_GT_STRG_EN 1
# HTCC trigger logic
SSP_GT_STRG_HTCC_EN 1
SSP_SLOT 3 # sector 1 SSP
SSP_GT_STRG_HTCC_MASK 0x0000000000FF
SSP_SLOT 4 # sector 2 SSP
SSP_GT_STRG_HTCC_MASK 0x00000000FF00
SSP_SLOT 5 # sector 3 SSP
SSP_GT_STRG_HTCC_MASK 0x000000FF0000
SSP_SLOT 6 # sector 4 SSP
SSP_GT_STRG_HTCC_MASK 0x0000FF000000
SSP_SLOT 7 # sector 5 SSP
SSP_GT_STRG_HTCC_MASK 0x00FF00000000
SSP_SLOT 8 # sector 6 SSP
SSP_GT_STRG_HTCC_MASK 0xFF0000000000
SSP_SLOT all
SSP_GT_STRG_HTCC_WIDTH 0
# PCAL cluster trigger logic
SSP_GT_STRG_PCAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_PCAL_CLUSTER_EMIN 3000
SSP_GT_STRG_PCAL_CLUSTER_WIDTH 96
########################
# Sector Trigger bit 7 #
#
# PCAL(> 10 MeV) ECAL(>10 MeV)
########################
SSP_GT_STRG 7
SSP_GT_STRG_EN 1
# PCAL cluster trigger logic: EMIN in 0.1 MeV units
SSP_GT_STRG_PCAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_PCAL_CLUSTER_EMIN 100
SSP_GT_STRG_PCAL_CLUSTER_WIDTH 96
# ECAL cluster trigger logic: EMIN in 0.1MeV units
SSP_GT_STRG_ECAL_CLUSTER_EMIN_EN 1
SSP_GT_STRG_ECAL_CLUSTER_EMIN 100
SSP_GT_STRG_ECAL_CLUSTER_WIDTH 96
#######################################
# 'SSP_GTC_' - central detectors logic
#######################################
SSP_GTC_LATENCY 5000
SSP_GTC_FT_ESUM_DELAY 0
SSP_GTC_FT_CLUSTER_DELAY 1180
SSP_GTC_FT_ESUM_INTWIDTH 0
SSP_GTC_FANOUT_ENABLE_CTOFHTCC 1
SSP_GTC_FANOUT_ENABLE_CND 1
###################################################
# 'SSP_GTC_CTRG_' - central detectors trigger bits
###################################################
########################
# Central Trigger bit 0 CTRG0: FT(300-4000)xHD(2)
########################
SSP_GTC_CTRG 0
SSP_GTC_CTRG_EN 1
SSP_GTC_CTRG_FT_CLUSTER_EN 1
SSP_GTC_CTRG_FT_CLUSTER_EMIN 300
SSP_GTC_CTRG_FT_CLUSTER_EMAX 4000
SSP_GTC_CTRG_FT_CLUSTER_HODO_NMIN 2
SSP_GTC_CTRG_FT_CLUSTER_NMIN 1
SSP_GTC_CTRG_FT_CLUSTER_WIDTH 0
SSP_GTC_CTRG_FT_ESUM_EN 0
SSP_GTC_CTRG_FT_ESUM_EMIN 0
SSP_GTC_CTRG_FT_ESUM_WIDTH 0
########################
# Central Trigger bit 1 CTRG1: FT(500-8500) 2 clusters
########################
SSP_GTC_CTRG 1
SSP_GTC_CTRG_EN 1
SSP_GTC_CTRG_FT_CLUSTER_MULT_EN 1
SSP_GTC_CTRG_FT_CLUSTER_MULT_COINCIDENCE 16
SSP_GTC_CTRG_FT_CLUSTER_MULT_MIN 2
SSP_GTC_CTRG_FT_CLUSTER_EMIN 500
SSP_GTC_CTRG_FT_CLUSTER_EMAX 8500
SSP_GTC_CTRG_FT_CLUSTER_HODO_NMIN 0
SSP_GTC_CTRG_FT_CLUSTER_NMIN 1
SSP_GTC_CTRG_FT_CLUSTER_WIDTH 0
########################
# Central Trigger bit 2 CTRG2: FT(100-8000)
########################
SSP_GTC_CTRG 2
SSP_GTC_CTRG_EN 1
SSP_GTC_CTRG_FT_CLUSTER_EN 1
SSP_GTC_CTRG_FT_CLUSTER_EMIN 100
SSP_GTC_CTRG_FT_CLUSTER_EMAX 8000
SSP_GTC_CTRG_FT_CLUSTER_HODO_NMIN 0
SSP_GTC_CTRG_FT_CLUSTER_NMIN 1
SSP_GTC_CTRG_FT_CLUSTER_WIDTH 0
SSP_GTC_CTRG_FT_ESUM_EN 0
SSP_GTC_CTRG_FT_ESUM_EMIN 0
SSP_GTC_CTRG_FT_ESUM_WIDTH 0
########################
# Central Trigger bit 3 CTRG3: FT(300-8500)xHD(2)
########################
SSP_GTC_CTRG 3
SSP_GTC_CTRG_EN 1
SSP_GTC_CTRG_FT_CLUSTER_EN 1
SSP_GTC_CTRG_FT_CLUSTER_EMIN 300
SSP_GTC_CTRG_FT_CLUSTER_EMAX 8500
SSP_GTC_CTRG_FT_CLUSTER_HODO_NMIN 2
SSP_GTC_CTRG_FT_CLUSTER_NMIN 1
SSP_GTC_CTRG_FT_CLUSTER_WIDTH 0
SSP_GTC_CTRG_FT_ESUM_EN 0
SSP_GTC_CTRG_FT_ESUM_EMIN 0
SSP_GTC_CTRG_FT_ESUM_WIDTH 0
SSP_CRATE end
########################################
# Trigger stage 3 (vtp in trig2 crate) #
########################################
VTP_CRATE trig2vtp
##VTP_W_OFFSET 7900
#VTP_W_OFFSET 7650
VTP_W_OFFSET 6624
VTP_W_WIDTH 400
# slot: 10 13 9 14 8 15 7 16 6 17 5 18 4 19 3 20
# payload: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VTP_PAYLOAD_EN 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
# global latency
##VTP_GT_LATENCY 6450
VTP_GT_LATENCY 5426
VTP_GT_WIDTH 16
# TRIGGER BITS:
# trig number
# | ssp trig mask
# | | ssp sector mask
# | | | multiplicity
# | | | | coincidence=#extended_clock_cycles
# | | | | | ssp central trig mask
# | | | | | |
#
# Electron, All Sectors with DC
VTP_GT_TRGBIT 0 3 63 1 1 0 # SSP STRG0|STRG1, SECTOR 1-6
# Electron, Individual Sectors with DC
VTP_GT_TRGBIT 1 3 1 1 1 0 # SSP STRG0|STRG1, SECTOR 1
VTP_GT_TRGBIT 2 3 2 1 1 0 # SSP STRG0|STRG1, SECTOR 2
VTP_GT_TRGBIT 3 3 4 1 1 0 # SSP STRG0|STRG1, SECTOR 3
VTP_GT_TRGBIT 4 3 8 1 1 0 # SSP STRG0|STRG1, SECTOR 4
VTP_GT_TRGBIT 5 3 16 1 1 0 # SSP STRG0|STRG1, SECTOR 5
VTP_GT_TRGBIT 6 3 32 1 1 0 # SSP STRG0|STRG1, SECTOR 6
# Electron, All sectors without DC
VTP_GT_TRGBIT 7 96 63 1 1 0 # SSP STRG5|STRG6, SECTOR 1-6
# PCAL(>10)xECAL(>10 MeV) All sectors without DC
VTP_GT_TRGBIT 8 128 63 1 1 0 # SSP STRG7, SECTOR 1-6
# DC x FTOFPCU x PCAL>15MeV, Individual Sectors (for tagging/efficiency studies)
VTP_GT_TRGBIT 13 4 1 1 1 0 # SSP STRG2, SECTOR 1
VTP_GT_TRGBIT 14 4 2 1 1 0 # SSP STRG2, SECTOR 2
VTP_GT_TRGBIT 15 4 4 1 1 0 # SSP STRG2, SECTOR 3
VTP_GT_TRGBIT 16 4 8 1 1 0 # SSP STRG2, SECTOR 4
VTP_GT_TRGBIT 17 4 16 1 1 0 # SSP STRG2, SECTOR 5
VTP_GT_TRGBIT 18 4 32 1 1 0 # SSP STRG2, SECTOR 6
# FTOF x PCAL>15MeV x ECAL>40MeV (2 Sectors)
VTP_GT_TRGBIT 19 8 9 2 1 0 # SSP STRG3, SECTOR 1 & 4
VTP_GT_TRGBIT 20 8 18 2 1 0 # SSP STRG3, SECTOR 2 & 5
VTP_GT_TRGBIT 21 8 36 2 1 0 # SSP STRG3, SECTOR 3 & 6
# FT(300 - 8500) MeV x DC x FTOFPCU x PCAL>15MeV x CTOF (2 Sectors)
VTP_GT_TRGBIT 24 16 63 1 1 8 # SSP STRG4, SECTOR 1-6, CTRG3
# FT(300-4000)MeV x DC x FTOFPCU x PCAL>15MeV (2 Sectors)
VTP_GT_TRGBIT 25 4 63 2 1 1 # SSP STRG2, SECTOR 1-6, CTRG0
# 2 FT clusters (500-8500)MeV
VTP_GT_TRGBIT 26 0 63 1 0 2 # CTRG1
# FT(100-8000)MeV without hodoscope
VTP_GT_TRGBIT 27 0 63 1 0 4 # CTRG2
# PULSER
VTP_GT_TRG 31
VTP_GT_TRG_PULSER_FREQ 100.0
VTP_CRATE end
############################
# TS settings (trig1 crate)
############################
TS_CRATE trig1
#lock-roc mode
#TS_BLOCK_LEVEL 1
#TS_BUFFER_LEVEL 1
# with micromega
#TS_BLOCK_LEVEL 10
#TS_BUFFER_LEVEL 8
#TS_HOLDOFF 1 30 1
#TS_HOLDOFF 2 30 1
#TS_HOLDOFF 3 30 1
#TS_HOLDOFF 4 30 1
# production: 5 5 15 10
TS_BLOCK_LEVEL 40
TS_BUFFER_LEVEL 8
TS_HOLDOFF 1 5 1
TS_HOLDOFF 2 5 1
TS_HOLDOFF 3 15 1
TS_HOLDOFF 4 10 1
# crashes VTPs
#TS_BLOCK_LEVEL 40
#TS_BUFFER_LEVEL 8
#TS_HOLDOFF 1 10 1
#TS_HOLDOFF 2 10 1
#TS_HOLDOFF 3 7 1
#TS_HOLDOFF 4 5 1
#
# TS GTP trigger mask
#
TS_GTP_INPUT_MASK 0xFFFFFFFF
#bit 28
#TS_GTP_INPUT_MASK 0x10000000
##TS_GTP_INPUT_MASK 0x00000000
#
# TS FP trigger mask
#
# 0x80 - FARADAY
# 0x100 - SVT
# 0x200 - CTOF
# 0x400 - CND
# 0x800 - MVT
# 0x1000 - helicity
TS_FP_INPUT_MASK 0x00001000
###TS_FP_INPUT_MASK 0x00000000
# TS_GTP_PRESCALE bit prescale
# TS_FP_PRESCALE bit prescale
# Note: actual prescale is 2^(prescale-1)+1
# prescale from 0 to 15
# bit from 0 to 31 Prescale=(1-32)
#
# NO PRESCALE ON MAIN TRIGGER BITS 1-7
# PRESCALE BIT NUMBER HERE IS +1 wrt BIT DEFINITION, I.E. BIT 0 ABOVE IS BIT 1 HERE, .. , BIT 31 ABOVE is BIT 32 HERE
# TriggerBits 7-Sector 1
TS_GTP_PRESCALE 8 5
# TriggerBits 8-Sector 4
TS_GTP_PRESCALE 9 12
####### Not used ########
# TriggerBit 9
TS_GTP_PRESCALE 10 15
# TriggerBit 10
TS_GTP_PRESCALE 11 15
# TriggerBit 11
TS_GTP_PRESCALE 12 15
# TriggerBit 12
TS_GTP_PRESCALE 13 15
#
##### FTOF*PCU tagging triggers
#
# TriggerBit 13 DC x FTOFPCU x PCAL>15MeV, S1
TS_GTP_PRESCALE 14 15
# TriggerBit 14 DC x FTOFPCU x PCAL>15MeV, S2
TS_GTP_PRESCALE 15 15
# TriggerBit 15 DC x FTOFPCU x PCAL>15MeV, S3
TS_GTP_PRESCALE 16 15
# TriggerBit 16 DC x FTOFPCU x PCAL>15MeV, S4
TS_GTP_PRESCALE 17 15
# TriggerBit 17 DC x FTOFPCU x PCAL>15MeV, S5
TS_GTP_PRESCALE 18 15
# TriggerBit 18 DC x FTOFPCU x PCAL>15MeV, S6
TS_GTP_PRESCALE 19 15
#
###### OPPOSITE SECTOR TRIGGERS ####
#
# TriggerBit 19 FTOFxPCALxECAL S1-4
TS_GTP_PRESCALE 20 0
# TriggerBit 20 FTOFxPCALxECAL S2-5
TS_GTP_PRESCALE 21 0
# TriggerBit 21 FTOFxPCALxECAL S3-6
TS_GTP_PRESCALE 22 0
##### Not used #####
# TriggerBit 22
TS_GTP_PRESCALE 23 15
# TriggerBit 23
TS_GTP_PRESCALE 24 15
#
##### FT TRIGGERS ####
#
# TriggerBit 24 Sector4xDC
TS_GTP_PRESCALE 25 6
# TriggerBit 25 FTx[FTOFxPCAL]^2
TS_GTP_PRESCALE 26 0
# TriggerBit 26 FTx[FTOFxPCAL]^3
TS_GTP_PRESCALE 27 6
# TriggerBit 27 Sector5xDC
TS_GTP_PRESCALE 28 15
# TriggerBit 28
TS_GTP_PRESCALE 29 15
# TriggerBit 29
TS_GTP_PRESCALE 30 15
# TriggerBit 30
TS_GTP_PRESCALE 31 15
#Pulser
TS_GTP_PRESCALE 32 0
# First arg: 0-disable,
# 1-enable;
# | Prescale (15-7Hz, 7-3.5kHz, 5-15kHz, 4-30kHz, 3-60kHz)
# | |
TS_RANDOM_TRIGGER 0 5
TS_CRATE end
-------------- next part --------------
A non-text attachment was scrubbed...
Name: gotra.vcf
Type: text/x-vcard
Size: 102 bytes
Desc: not available
URL: <https://mailman.jlab.org/pipermail/clas12_verystrange/attachments/20180412/f78e21b0/attachment-0002.vcf>
More information about the Clas12_verystrange
mailing list