[Clas12_verystrange] Banks, trigger bits and Link to presentation

[Lei Guo]

Hi shankar this is great! Can we also do the same for the 10.6 GeV runs and the different field setting runs as well?

Cheers!

Sent from my iPhone

> On Apr 30, 2018, at 15:21, Michael Dugger <dugger at jlab.org> wrote:
> 
> 
> Shankar,
> 
> That is great news. Thanks a bunch :)
> 
> Take care,
> Michael
> 
>> On Mon, 30 Apr 2018, Shankar Adhikari wrote:
>> 
>> Hi Mike,
>> 
>> I have a filtered file which only have those banks you asked for along with
>> "RUN::config" , "Run::rf" and "RUN::trigger".
>> Please look at the location below. It includes all the files of run number
>> 3050 that are located in /volatile/clas12/data/rg-a/pass0/tag5b.3.3/.
>> I merged 686 files to a single file.
>> 
>> /w/hallb-scifs17exp/clas12/shankar/pass0/tag5b.3.3
>> 
>> Please let me know if you have any question.
>> 
>> Thank you
>> 
>> Shankar
>> 
>>> On Wed, Apr 25, 2018 at 1:16 PM, Michael Dugger <dugger at jlab.org> wrote:
>>> 
>>> 
>>> Hi,
>>> 
>>> We need to get a preliminary bank list setup so that Shankar
>>> can start filtering files. Most likely, any bank list we make
>>> right now will need to be updated in the near future. We just
>>> want a preliminary list to get us started.
>>> 
>>> Please send a bank list to Shankar <sadhi003 at fiu.edu> by
>>> tomorrow so he can start filtering files.
>>> 
>>> A big thanks to Shankar for volunteering to filter files for
>>> us!
>>> 
>>> To get us started, here is my preliminary bank list:
>>> 
>>> REC_Particle
>>> REC_Scintillator
>>> REC_ForwardTagger
>>> REC_Event
>>> FT_particles
>>> FTCAL_clusters
>>> 
>>> Link to my presentation today:
>>> 
>>> https://userweb.jlab.org/~dugger/veryStrange/realDataV4b.pdf
>>> 
>>> Trigger bits:
>>> 
>>> I am using a ROOT based analysis where the trigger bits can be found using
>>> the code:
>>> 
>>> #include <bitset>
>>> int getBit(int n, int k)
>>> {
>>>  return (n & (1<<k)) != 0;
>>> }
>>> 
>>> where n comes from REC_Event_TRG and k is the trigger bit of interest.
>>> 
>>> For example, if I want to get the value of trigger bit 0, I have
>>> 
>>> int trg0 = getBit(myTree.REC_Event_TRG->at(0),0);
>>> 
>>> A picture of trigger bits can be found at (sent to me by Benjamin Raydo):
>>> 
>>> https://userweb.jlab.org/~dugger/veryStrange/clonpc13_20180412_074234.gif
>>> 
>>> Note: The trigger bits have not been locked down. The bits can be defined
>>> differently for some runs. Benjamin Raydo sent me a list for run 3050:
>>> 
>>> "
>>> Here is a summary of the trigger configuration for run 3050:
>>> 
>>> Triggerbit  Description
>>> 0           Electron (all sectors):
>>>               HTCC x PCAL>60MeV x ECAL>10MeV x (ECAL+PCAL)>150MeV
>>>                  +
>>>               HTCC x PCAL>150MeV
>>> 
>>> 1-6         Electron (per sector), same definition as above
>>> 
>>> 7-12        HTCC (per sector)
>>> 
>>> 13-18       PCAL>60MeV (per sector)
>>> 
>>> 19-24       ECAL>10MeV (per sector)
>>> 
>>> 25          HTCC x PCAL>60MeV (all sectors)
>>> 
>>> 26          HTCC x PCAL>150MeV (all sectors)
>>> 
>>> 27          PCAL>60MeV x ECAL>10MeV (all sectors)
>>> 
>>> 28          PCAL>10MeV x FTOF (all sectors)
>>> 
>>> 29          8000MeV>FTCAL>100MeV
>>> 
>>> 30          8000MeV>FTCAL>500MeV
>>> 
>>> 31          Pulser @ 1kHz
>>> "
>>> 
>>> Take care,
>>> Michael
>>> 
>>> _______________________________________________
>>> Clas12_verystrange mailing list
>>> Clas12_verystrange at jlab.org
>>> https://mailman.jlab.org/mailman/listinfo/clas12_verystrange
>>> 
>> 
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