[Dsg-ft] CSS GUI for Hall B FT Interlock System
Nathan Baltzell
baltzell at jlab.org
Tue Apr 25 10:08:15 EDT 2017
Thanks Peter,
Yes, it is definitely important to have all DSG's Hall B hardware interlocks in EPICS. We weren't aware you were also working on cs-studio user interfaces, but that is certainly welcome!
> A softIOC is not needed since the FT Interlock cRio is configured as an EPICS server (IOC).
I’m not so sure about this. On cRios, one thing we've found necessary in the past, in order to get full EPICS functionality, is to have them read/write (e.g. at 1 Hz) to duplicate soft channels (with different names) on a real EPICS ioc. This is due to incomplete EPICS implementation on the cRio/labview, e.g. alarm fields. Brian has helped with this previously for all the gas cRios in Hall B.
It would be nice if we can modify and shorten the PV names on this softioc from what you have in your pdf, in order to fit the existing conventions in the rest of Hall B EPICS. Can you provide the PV list in a format that is easily modifiable (e.g. excel, ascii)? Then we can converge on the names and generate the softioc.
Also, we'll need to know this cRio’s ip address.
And later we can discuss what needs to go in the alarm handler ...
Thanks,
Nathan
On Apr 25, 2017, at 6:54 AM, Peter Bonneau <bonneau at jlab.org> wrote:
> Wesley,
>
> Under the Detector/FT menu in the clas12_menu.opi file, there needs to be GUI's for the FT Interlock system.
> The CSS test GUI we made to test the FT EPICS interface could be used, however it does not look like the other existing CLAS12 GUI's (compact, dark colored background, etc.).
> In the new SVT svtOverview.opi, a section for hard interlocks has been added. GUI's similar to this is needed for the FT.
> A softIOC is not needed since the FT Interlock cRio is configured as an EPICS server (IOC).
> Regarding the alarm handler, there will be a few signals for the handler to report the status of the system. We'll list them later after talking to the FT group that is coming in May.
> DSG will be implementing a similar new Hardware Interlock System for the RICH in the upcoming few months. We'll also be upgrading the existing SVT Hardware Interlock System to include the EPICS interface that will use the GUI's that have been started already. I'll mention these projects in the next slow controls meeting.
> Peter
>
> On 4/24/2017 11:01 AM, Wesley Moore wrote:
>> Peter,
>>
>> It's not clear what you are asking. It looks like you are pretty far along. The older version of cs-studio you are using may have compatibility issues with the latest version we are testing. But that's easy to try.
>>
>> The documentation and block diagram you doesn't really answer these things:
>>
>> Do you need a softIOC to write these PVs too or did you make one?
>> Do you need the alarm handler setup?
>>
>> You still have a standing invitation to the slow controls meetings. But as Brian/George did for gas systems, you can keep us in the loop without attending.
>>
>> Wesley
>>
>> From: "Peter Bonneau" <bonneau at jlab.org>
>> To: "Wesley Moore" <wmoore at jlab.org>
>> Cc: dsg-ft at jlab.org
>> Sent: Monday, April 24, 2017 9:08:21 AM
>> Subject: CSS GUI for Hall B FT Interlock System
>> Hello Wesley,
>>
>> The Hall B FT group needs a CSS GUI for the FT Hardware Interlock System. This GUI would be integrated into the other FT EPICS screens.
>>
>> The FT Hardware Interlock System is an independent backup system which can disable the LV, HV, and FT chiller. The system can be monitored and trip thresholds adjusted via Labview and/or an EPICS GUI.
>> DSG has completed the initial programming on the cRio for the EPICS interface. Located in the EEL building and configured as an EPICS server, the PV signals are now available via the Hall B .86 subnet. The EPICS interface has been tested via a CSS test GUI.
>> Detailed information on the system configuration, hardware, EPICS PV signal names, CSS test screen .OPI file, and LabVIEW interface can be found on the FT Hardware Interlock System website here:
>> https://userweb.jlab.org/~bonneau/FT%20Hardware%20Interlock%20System/
>> Peter
>>
>
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