[Dsg-hallb_magnets] Questions Comms Fast DAQ

[Nicholas Sandoval]

Hello Pablo,

Thanks for checking in on the code, it is great that you are keeping up with progress.  I will try and answer your questions below:

1.   As we have been having a number of issues with the cRIO's this interlock was placed on a controlled ramp down.  Before commissioning has concluded and the fast DAQ is deemed stable we will relocate it to the Fast Dump interlock(if the team decides that is the best option).  We may learn that a controlled ramp is still the best method of treating this failure.  

2.   Again during commissioning we would prefer not to have a fast dump.  Especially on a spurious trip, the delay period has been increased so that we could try and clear the interlock if it was not deemed serious.  This is because we are fully staffed monitoring the data real time.  Any real quench event will be caught by the Hardwire QD.  

3.  Which watchdog are you referring to?  The removal of both comm error fills was deemed the appropriate action as a result of the meeting.  This is reflective of your updated comms map distributed after the meeting.  Do you still have concerns about this?  If so, could you please be specific of which sensors and what actions you would be most concerned with and how you would prefer it to be handled.

4.  What control and alarms are you referring to?  

Let me know if you have any more questions, also it may be easier to sit down and look at the code in person and discuss the logic together.  Let me know and we can schedule a time.  

Best Regards,

Nick

----- Original Message -----
From: "Pablo Campero Rojas" <campero at jlab.org>
To: "Nicholas Sandoval" <sandoval at jlab.org>
Cc: "dsg-hallb magnets" <dsg-hallb_magnets at jlab.org>
Sent: Monday, October 24, 2016 3:48:51 PM
Subject: Questions Comms Fast DAQ

Hello Nick, 




I have been looking at the PLC code updates that were posted on the logbook. I have some questions with regards to the Communications between Fast DAQ and LV cRIO and PLC Torus. 




Fast DAQ Crio – PLC communications 




1. Why are we having a Controlled Ramp Down when we have comm failure between the FastDaq cRIO and PLC? I thought that this comm failure should generate automatically a PLC FAST DUMP in accordance with the recommendations in the meeting. 




2. In the logbook (Torus PLC updates- Lognumber 3430316) the time mention is 1 sec to have a Controlled Ramp Down after communication failure. But I can see that in the current PLC program at routine (VT_Testing), we have 6 sec. Which one is the correct time, posting or program? 




Fast LV Crio – PLC communications 




3. I noted that the comm error fills have been removed for the LV cRIO comms and Cryccon comm. So, now I think that if we lost the comm in this section we are going to have a reading freeze of the last value for all signals. Is this what we want? Because the watchdog may not work and we don't have anything to go to Controlled Ramp Down. 




4. Where is the control that sends the alarms to EPICS side when we have comm failure? 







Thanks, 




Pablo Campero 

Detector Support Group