[Dsg-hallb_magnets] MPS Status Bits during event on 6/26

[Brian Eng]

It looks like some bits are being used that aren't documented in the manual (e.g. manual says bit 24 is always 0 and in the code it's description says spare, but is always 1 for below). Anyone have what the status bits mean in the latest firmware?

The status is broken into 2 values one for the lower 16 bits the other for the higher ones.

clasrun at clonsl2:clasrun> caget B_SOL:MPS:Status2.INP
B_SOL:MPS:Status2.INP          @PLC_SOL Solenoid_MPS.Status1_BOOLS[16]
clasrun at clonsl2:clasrun> caget B_SOL:MPS:Status.INP
B_SOL:MPS:Status.INP           @PLC_SOL Solenoid_MPS.Status1_BOOLS[0]

So for below, high = Status2 and low = Status

Prior to the controlled ramp
high = 128, low = 66
high = 1000 0000, low = 0000 0000 0100 0010

Controlled ramp
high = 192, low = 66
high = 1100 0000, low = 0000 0000 0100 0010

Fast dump
high = 224, low = 8771
high = 1110 0000, low = 0010 0010 0100 0011

shortly after high went to 228 while low stayed the same
high = 1110 0100, low = 0010 0010 0100 0011


>From what I can tell from the code bit 23 is only MPS Not Ready ... which isn't very helpful at all for determining why it went into a controlled ramp. For the initial fast dump it was Sum - Interlock & Preregulator Failure ... also not very helpful.
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