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Hi Ben,</div>
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In October, we're planning on doing some testing to optimize RICH's cooling system and see what would needed to modify the system to cool two RICH sectors.</div>
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With respect to the RICH readout electronics, FPGAs, and their timing, are there any temperature limits we should take into consideration when testing the cooling system?</div>
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Thanks,</div>
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Tyler<br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Amrit Yegneswaran <yeg@jlab.org><br>
<b>Sent:</b> Monday, September 23, 2019 4:48 PM<br>
<b>To:</b> Tyler Lemon <tlemon@jlab.org>; Marco Mirazita <Marco.Mirazita@lnf.infn.it><br>
<b>Cc:</b> dsg-rich <dsg-rich@jlab.org><br>
<b>Subject:</b> Re: [Dsg-rich] [EXTERNAL] RICH electronics</font>
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tyler </div>
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address fpga temp issue with ben.</div>
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i believe 60c is right at the edge of timing issues, not sure.</div>
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<div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Dsg-rich <dsg-rich-bounces@jlab.org> on behalf of Tyler Lemon <tlemon@jlab.org><br>
<b>Sent:</b> Monday, September 23, 2019 3:11 PM<br>
<b>To:</b> Marco Mirazita <Marco.Mirazita@lnf.infn.it><br>
<b>Cc:</b> dsg-rich <dsg-rich@jlab.org><br>
<b>Subject:</b> Re: [Dsg-rich] [EXTERNAL] RICH electronics</font>
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<span style="font-family:calibri,arial,helvetica,sans-serif; font-size:12pt; line-height:normal; color:rgb(0,0,0); background-color:rgba(0,0,0,0)">Hi Marco,</span></div>
<br>
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<span style="font-family:calibri,arial,helvetica,sans-serif; font-size:12pt; line-height:normal; color:rgb(0,0,0); background-color:rgba(0,0,0,0)">Looking back at EP temperatures during steady operations (I picked 3/10/2019 to 3/31/2019), Hardware Interlock
RTDs were ~40 deg C and FPGA temperatures were ~60 deg C.</span></div>
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<br>
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<div><span style="font-family:calibri,arial,helvetica,sans-serif; font-size:12pt; line-height:normal; color:rgb(0,0,0); background-color:rgba(0,0,0,0)">Is there a temperature increase that would be considered acceptable? For example if the FPGA temperatures
were ~70 deg C rather than ~60 deg C?</span></div>
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<span style="font-family:calibri,arial,helvetica,sans-serif; font-size:12pt; line-height:normal; color:rgb(0,0,0); background-color:rgba(0,0,0,0)">The first test should be determining what flow rate is actually needed to maintain EP temperatures in that acceptable
range with all RICH electronics on.</span></div>
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<br>
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-Tyler<br>
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<div id="x_x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Marco Mirazita <Marco.Mirazita@lnf.infn.it><br>
<b>Sent:</b> Monday, September 23, 2019 9:01 AM<br>
<b>To:</b> Tyler Lemon <tlemon@jlab.org><br>
<b>Cc:</b> dsg-rich <dsg-rich@jlab.org><br>
<b>Subject:</b> Re: [Dsg-rich] [EXTERNAL] RICH electronics</font>
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<div class="x_x_PlainText">Hi Tyler,<br>
sorry, I had in mind that the replacement of the PT was scheduled for <br>
last Wednesday.<br>
<br>
The tests we have in mind to optimize the cooling system is basically <br>
what you said. But we still have to make a plan of the specific <br>
measurements we need. We will do this plan in the next weeks.<br>
Any suggestion from you and the DSG is welcome.<br>
<br>
Best regards,<br>
Marco<br>
<br>
<br>
Il 2019-09-20 20:46 Tyler Lemon ha scritto:<br>
> Hi Marco,<br>
> <br>
> The PT replacement has not been completed. It is scheduled for next<br>
> Wednesday September 25.<br>
> <br>
> As for the visit to optimize RICH running conditions, I will not be<br>
> at work for at least part of the week of October 21 to October 25,<br>
> however there should be other people from DSG that would be able to<br>
> help.<br>
> <br>
> What tests are being planned for the visit? Would it essentially be<br>
> varying the settings of the cooling system (flow rate, buffer tank<br>
> pressure, compressor output pressure) and seeing how the temperature<br>
> within RICH is affected?<br>
> <br>
> Best regards,<br>
> Tyler<br>
> <br>
> -------------------------<br>
> <br>
> FROM: Marco Mirazita <Marco.Mirazita@lnf.infn.it><br>
> SENT: Friday, September 20, 2019 12:21 PM<br>
> TO: Tyler Lemon <tlemon@jlab.org><br>
> CC: dsg-rich <dsg-rich@jlab.org>; Valery Kubarovsky <vpk@jlab.org>;<br>
> marco contalbrigo <mcontalb@fe.infn.it><br>
> SUBJECT: Re: [EXTERNAL] RICH electronics<br>
> <br>
> Hi Tyler,<br>
> do you know if Bob has completed the replacement of the FT?<br>
> If so, the compressor could be restarted on Monday morning, once we<br>
> are<br>
> sure everything is working properly I can turn on the RICH<br>
> electronics<br>
> and keep it on for the night and then make the tests on Tuesday<br>
> morning.<br>
> <br>
> As you know, we didn't have much time to optimize the working point<br>
> of<br>
> the cooling system after the RICH installation, we simply choose<br>
> running<br>
> conditions that ensure a safe operation of the detector.<br>
> But these running conditions might be problematic with two RICH<br>
> modules<br>
> and definitely not sustainable in case of failure of one of the two<br>
> compressors.<br>
> Therefore, also in preparation of the upcoming CLAS12 data taking,<br>
> I'm<br>
> planning a visit to JLab for Dario and Sandro to try to optimize the<br>
> running conditions, and to be effective this work must be coordinated<br>
> <br>
> with you and the DSG.<br>
> The proposed dates are from October 21 to October 31. Is this plan ok<br>
> <br>
> for you?<br>
> Thank you,<br>
> Marco<br>
> <br>
> Il 2019-09-18 14:12 Tyler Lemon ha scritto:<br>
> > Hi Marco,<br>
> ><br>
> > Bob Miller has scheduled the replacement of the faulty pressure<br>
> > transducer (PT) on the air-cooling buffer tank for next Wednesday,<br>
> > September 25.<br>
> ><br>
> > Could the tests be scheduled to start Thursday September 26?<br>
> ><br>
> > Best regards,<br>
> > Tyler<br>
> ><br>
> > -------------------------<br>
> ><br>
> > FROM: Marco Mirazita <Marco.Mirazita@lnf.infn.it><br>
> > SENT: Wednesday, September 18, 2019 4:08 AM<br>
> > TO: Tyler Lemon <tlemon@jlab.org><br>
> > CC: dsg-rich <dsg-rich@jlab.org>; Valery Kubarovsky <vpk@jlab.org>;<br>
> > marco contalbrigo <mcontalb@fe.infn.it><br>
> > SUBJECT: [EXTERNAL] RICH electronics<br>
> ><br>
> > Hi Tyler,<br>
> > the RICH electronics is off since quite a lot of time and in<br>
> > preparation<br>
> > of the upcoming CLAS12 running I would like to turn it on to verify<br>
> > that<br>
> > everything is still working and eventually to take new scaler<br>
> > calibration data.<br>
> > I could plan this work for the beginning of the next week.<br>
> > In preparation for that, we should coordinate to have all the<br>
> systems<br>
> ><br>
> > ready. Would you be available to start the compressor for the test?<br>
> > Thank you,<br>
> > Marco<br>
> <br>
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