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Hello,</div>
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Attached are the minutes from today's meeting.</div>
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Vincenzo,</div>
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Could you please send us a copy of the slides you showed during the meeting? I'll append them to the minutes for when they're posted to the DSG website.<br>
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Best regards,</div>
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Tyler<br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Dsg-rich <dsg-rich-bounces@jlab.org> on behalf of Brian Eng <beng@jlab.org><br>
<b>Sent:</b> Monday, October 14, 2019 10:17 AM<br>
<b>To:</b> marco mirazita <mirazita@jlab.org><br>
<b>Cc:</b> dsg-rich@jlab.org <dsg-rich@jlab.org><br>
<b>Subject:</b> Re: [Dsg-rich] [EXTERNAL] meeting with DSG</font>
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<div class="PlainText">Hi Marco,<br>
<br>
Regarding the FPGA temperatures, since we don't have the FPGA code itself we can only make an educated guess, but it's quite likely that it is using the on-die temperature sensor.<br>
<br>
<a href="https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf">https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf</a><br>
(page 14, figure 1-1)<br>
<br>
Note that this sensor has an error of +/- 4C when the temp is < 100C<br>
<br>
> On Oct 14, 2019, at 3:35 AM, mirazita@jlab.org wrote:<br>
> <br>
> <br>
> marco mirazita has invited you to a meeting. <br>
<br>
<br>
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