[Dsg-hallc_controls] HV CAEN test results

[Brad Sawatzky]

Hi Pablo,

Please stay in touch with CAEN until they have resolved the underlying
bugs in their system(s).  We have a heavy investment in CAEN HV on site
(not just in Hall C) and I think getting the bugs you've identified is
a really a must.


I would suggest testing the new mainframe and boards for any clear
mechanical/hardware faults -- first pass triage for shipping damage or
faults that were not caught at the factory.  That will at least allow us
to put those units in our 'spares' reserve.

I expect we will have to repeat (at least abbreviated tests) on all
crates/modules after CAEN provides new firmware in order to verify
that the other problems you've identified are really fixed.

-- Brad

On Fri, 08 Nov 2019, Pablo Campero Rojas wrote:

> Hello Brad, Stephen, and Cynthia
> 
> We tested CAEN SY4527 systems, attached is the talk I presented during
> our DSG meeting.  The talk is a summary of all communication tests.
> 
> After detailed reports of the issues found were sent to CAEN Tech
> Support, they suggested that we send one board back for further
> debugging, which we have done.
> 
> Could you please advise us on how to proceed with boards/mainframe
> that we have tested, and also how we should deal with the new
> boards/mainframe (19 boards and one mainframe).
> 
> Best Regards,
> 
> Pablo

-- 
Brad Sawatzky, PhD <brads at jlab.org>  -<>-  Jefferson Lab / Hall C / C111
Ph: 757-269-5947  -<>-  Fax: 757-269-5235  -<>- Pager: brads-page at jlab.org
The most exciting phrase to hear in science, the one that heralds new
  discoveries, is not "Eureka!" but "That's funny..."   -- Isaac Asimov