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excellent work aaron.</div>
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have a nice weekend.</div>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> Dsg-hallc_controls <dsg-hallc_controls-bounces@jlab.org> on behalf of Aaron Brown <ambrown@jlab.org><br>
<b>Sent:</b> Friday, April 17, 2020 3:43 PM<br>
<b>To:</b> Brad Sawatzky <brads@jlab.org>; dsg-hallc controls <dsg-hallc_controls@jlab.org><br>
<b>Cc:</b> Patrizia Rossi <rossi@jlab.org><br>
<b>Subject:</b> [Dsg-hallc_controls] CAEN Testing Analysis</font>
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Hello Brad,</div>
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I wanted to let you know that we have begun analyzing the results of the stability tests with load. I have attached a plot for one of the boards (#304) that detail the results of this test.
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As you can see, for this first board, all channels except for channels 11 and 24 were within the manufacturer's specification of +/- 0.2 V. Channel 11 was only ~120 mV below the lower range of accuracy and channel 24 was only ~50 mV below. The overall average
voltage for all of the channels on Board #304 was 1499.92 which is ~80 mV lower than the expected value of 1500 V.
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We will of course put all of this information, and more, in a detailed report for you when we are done with our analysis.
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We'll continue to keep you informed of our progress. If you have any questions or concerns, please do not hesitate to contact us.</div>
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Have a good weekend,</div>
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Aaron<br>
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