[Dsg-halld_plc] PVs to be added to IOC for display in WEDM

Tyler Lemon tlemon at jlab.org
Thu Jul 25 11:47:38 EDT 2019


Hello Hovanes,

For the Solenoid Power supply screen, the PV "SOL:a:MPS_Status_Read_DINT" is the one being parsed in CSS for the status bits.

When caget is used you get: "SOL:a:MPS_Status_Read_DINT 24 1 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 1 0 1 0 1"

EDM has a byte monitor that can handle up to 16 bits. The array parsed in CSS is 24 elements, it would need to be split up into multiple PVs. On the Solenoid interlocks screen, the "MPS Interlock Sum" status is also pulled out of this array using a script. Since CSS is using scripts to get individual status bits on multiple screens, it may be best to make 24 new, individual Boolean PVs for each status bit.

Also, on the Solenoid Voltages screen, the summed coil voltages below each coil graphic are obtained from a rule in CSS and cannot be displayed in EDM either. Four PVs will also need to be added to an IOC for the voltage sums.

For the FDC chiller screen, the EDM byte monitor may be able to use the existing PVs. I'll look at this this afternoon and let you know if anything needs to be added to an IOC.

Best regards,
Tyler
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