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<span>Compton Edet DAQ Mtg<br>
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<div>Oct 29, 2019<br>
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<div>Attending: Ben Raydo, Bryan Moffit, R. Michaels, Alex Camsonne, Iris Halilovic,<br>
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<div>Jinlong Zhang<br>
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<div>* Iris showed some plots from the VETROC readout using a pulser trigger.<br>
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<div>TDC peaks look reasonable and as expected. Previously, the FADC readout<br>
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<div>was checked. Now, these two readouts need to be merged.<br>
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<div><br>
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<div>* Discussed next steps<br>
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<div><br>
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<div> 1. Aforementioned merging of FADC and VETROC readout.<br>
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<div><br>
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<div> 2. Rate capability (need to scrounge a variable-rate pulse generator)<br>
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<div><br>
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<div> 3. Set up the self-triggering of the DAQ (i.e. it triggers on a hit<br>
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<div> or on a road in the Edet, or on a signal from the photon detector)<br>
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<div> (a) Bryan: will setup VTP OS w/CODA and library (1 day of work)<br>
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<div> (b) Ben: checks of VTP firmware after Bryan's work ( few hours of work)<br>
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<div> (c) Ben sent us a C code that emulates the VETROC trigger in the VTP.
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<div> We should test this with inputs. If we want a new trigger, we can modify
<br>
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<div> the C code, test it with inputs, and give it to Ben who will convert
<br>
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<div> it to the FPGA image for the VETROC. I'd advise to keep this <br>
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<div> trigger simple for now.<br>
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<div><br>
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<div> 3. In the hall, need to set up the VME crate. To be efficient, we'll<br>
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<div> use a 2nd crate (Alex), while testing the 1st one in the TEDF.<br>
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<div> Deadline to move everything to the hall: Nov 15. Then we need<br>
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<div> copies of helicity signal, photon signal, BCM, BPM, and the<br>
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<div> Edet signals. All that has to be finished by Nov 29. A challenge !<br>
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<div><br>
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<div> 4. New DAQ needs a new DAQ computer running CODA 3, so as not to <br>
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<div> interfere with the CMU DAQ, something like an "adaq4" or "compton2".</div>
<div> (Alex is looking into it.)<br>
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