[Halld-cpp] CPP meeting minutes
David Lawrence
davidl at jlab.org
Thu Jul 14 12:16:31 EDT 2016
Hi All,
Some minutes from this morning’s CPP meeting have been posted at the following link and copied below.
https://halldweb.jlab.org/wiki/index.php/%CE%A0_polarizability_Meeting_July_14,_2016 <https://halldweb.jlab.org/wiki/index.php/%CE%A0_polarizability_Meeting_July_14,_2016>
Regards,
-David
Minutes[edit <https://halldweb.jlab.org/wiki/index.php?title=%CE%A0_polarizability_Meeting_July_14,_2016&action=edit§ion=5>]
Attendees: Rory M., Bobby J., Andrew S., Matt D., David L., Elton S., Tim W.
FCAL Platform[edit <https://halldweb.jlab.org/wiki/index.php?title=%CE%A0_polarizability_Meeting_July_14,_2016&action=edit§ion=6>]
PrimEx η requires a calorimeter on the FCAL platform as well for continuous calibration via Compton scattering events
They have a readiness review coming up next Wednesday where a preferred and contingency solution are expected to be presented
Both solutions require use of the same space the FMWPC is expected to occupy
FCAL platform will need modifications:
Move electronics racks further apart
Enhanced structural support for FMWPC and large iron absorbers
Desirable to place FMWPC as close to FCAL as possible while still allowing access to FCAL dark room
Current FMWPC design has 8 chambers that are:
64"x64" x 2"
Made of Al hexcell w/ flat faces
Roughly 200 lbs each (Tim noted JLab guidelines limit human lifting to 50lbs)
Iron absorbers 20cm thick
Iron absorbers may be round to minimize material and match FCAL geometry
Shape driven more by engineering concerns than physics
We will need to move 1 full crate of fADC125 electronics to platform for FMWPC
Need two 72 channel modules per MWPC chamber (16 modules total)
(Plan is to borrow from CDC)
Schedule[edit <https://halldweb.jlab.org/wiki/index.php?title=%CE%A0_polarizability_Meeting_July_14,_2016&action=edit§ion=7>]
Approved experiments are now required to go through a readiness review in advance of getting scheduled to run
Elton suggested and there was consensus that we should aim for having a Readiness Review for CPP approximately 1 year for now
Tim will try and estimate how long it will take to do a complete design of the FCAL modifications
Final design parameters are not currently available so final engineering can't be done until we provide those
Elton suggested we start drafting a design spec. before meeting again with Tim in a couple of months
Need to keep TOF, FCAL folks in loop since rack movements require rerouting some cables which will require their involvement
fADC125 Test setup at UMass[edit <https://halldweb.jlab.org/wiki/index.php?title=%CE%A0_polarizability_Meeting_July_14,_2016&action=edit§ion=8>]
Andrew reported that test stand now appears to be ignoring lookback setting
No known changes to configuration or software
Suggested that they try different set of channels which connect to different 1st stage FPGA
Requires changes to Read-out-list (ROL) as well as moving plug on front panel
Andrew will work on this and consult with David as needed
If this doesn't work then module will need to be sent back to JLab for testing/repair
MWPC transport Cart[edit <https://halldweb.jlab.org/wiki/index.php?title=%CE%A0_polarizability_Meeting_July_14,_2016&action=edit§ion=9>]
Matt presented latest version of transport cart design
Modified slightly from last time:
Reinforced for greater strength/rigidity
Shorted brace bars to relax tolerance
Will measure clearance from floor for electronics etc. and then create parts list in order to proceed with procurement
Electronics[edit <https://halldweb.jlab.org/wiki/index.php?title=%CE%A0_polarizability_Meeting_July_14,_2016&action=edit§ion=10>]
Bobby presented current status of HV boards
Boards were manufactured slightly wider than than nominal width (9.6in). Since boards are laid out close-packed, this extra width added up over width of plate.
Sides were sanded to slightly less than nominal width allowing them all to be properly positioned
Bias boards are now expoxy'd to plate
Capacitors that stand HV off from signal lines were soldered.
Small prototype used surface mount while full sized prototype used through-hole
Design feature was missed by everyone that HV wire runs right over through holes on other side of board. This could short capacitor and physically displace wire if solder bumps were left there.
These have been ground down on full scale prototype, but will be fixed for next iteration of board.
Bobby will come to JLab on Mon. July 18 for 6 weeks. Tim has some cubicle space in TED with a computer he can use.
FMWPC Construction[edit <https://halldweb.jlab.org/wiki/index.php?title=%CE%A0_polarizability_Meeting_July_14,_2016&action=edit§ion=11>]
Rory gave an update on FMWPC construction
G10 is now attached to Al plate using thin layer of epoxy
Some care taken to calculate and measure correct amount of epoxy to get 4-5 mil expoxy layer
G10 plate boundaries seem well aligned. Difficult to detect boundary via sense of touch
O-ring machinging is complete
Purchased 6 ft ACME rod for aligning wires when attaching to chamber
acme rods have square thread grooves rather than "V" shaped grooves
these are used in things like 3D printers for accurate positioning
Measured with high precision ruler to be within about 10 mil over 6 ft.
Ordered class 3 "V"-groove rod from McMaster-Carr and will measure once it arrives.
Presentation/discussion of TOF triggering was deferred until later due to Andrew having to leave and us running low on time
π+π- simulation[edit <https://halldweb.jlab.org/wiki/index.php?title=%CE%A0_polarizability_Meeting_July_14,_2016&action=edit§ion=12>]
Deferred presentation of Elton's results due to lack of time
CPPsim[edit <https://halldweb.jlab.org/wiki/index.php?title=%CE%A0_polarizability_Meeting_July_14,_2016&action=edit§ion=13>]
David gave an abbreviated presentation of the status of simulating μ/π separation
Tools exist in a form that this type of study can now proceed.
David will talk with Bobby next week about continuing this during his visit to JLab.
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