[Halld-tagger] Voltage control for microscope
Richard Jones
richard.t.jones at uconn.edu
Mon Apr 2 19:17:59 EDT 2012
Hovanes,
These microscope readout control boards communicate with a host over a private ethernet segment. The physical layer is just RJ45 twisted pair ethernet, using a cheap 10Mb hub. The ethernet protocol can coexist with normal ip traffic without interference on this segment, but it only uses the ethernet transport layer so it requires the host to be on the local segment. The protocol does employ special broadcast packets for automatic discovery and global reset functions. It is our own protocol.
I think the best way to control it in the hall would be an epics application that runs on an in-crate computer with one of its ethernet ports dedicated to the private segment. Thank you for starting us thinking about this. Right now our software runs on a windows app built on the pcap library, but there is not a lot of investment in that. We just set that up because it was quick and did not require us to buy a VME crate.
-Richard J.
On 4/2/2012 3:56 PM, Hovanes Egiyan wrote:
> Hi Richard,
>
> We are planning the controls for voltages for Hall D. Tagger microscope
> will be using SiPMs for which UConn is providing the bias voltages and the
> power to the boards. At this stage we would like to know how these are in
> principle designed to interface with EPICS. Is this going to be a
> standalone
> Labview program which will have to be interfaced with EPICS, or you could
> provide a library that could be used to integrate it with EPICS on
> Linux, or
> you are using some standard communication protocol we could use to talk
> to these boards. Also I would like to know which parameters will be
> controlled
> and monitored. I listed below what (hopefully) will be available to the
> software
> for voltages for other detector components.
>
> o Voltage Setpoints (RW)
>
> o Voltage Readback (R)
>
> o Maximum Voltage (RW)
>
> o Current Readback (R)
>
> o Maximum current(s) [trip] (RW)
>
> o Time for trip condition before turning off (RW)
>
> o Channel Status [On/Off/RampingUp/RampingDown/Tripped/etc] (R)
>
> o Switch On/Off (W)
>
> o Board Temperature (R)
>
>
> Although it would be desirable if all detector components have similar
> features exposed
> to the shift operators, this list is obviously dependent on the
> features of the detector
> and can change.
>
> Also, when do you think we could have an opportunity to have a system
> at JLab that will allow us to develop an EPICS interface for these
> voltages?
>
> Thanks,
> Hovanes
>
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