<html><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; ">Online at <a href="https://halldweb1.jlab.org/wiki/index.php/April_10,_2013_Tracking_CDC/FDC#Minutes">https://halldweb1.jlab.org/wiki/index.php/April_10,_2013_Tracking_CDC/FDC#Minutes</a><div><br></div><div>and below without the picture.<br><div><br></div><div><br></div><div>Regards,</div><div><br></div><div>Naomi.</div><div><br></div><div><br></div><div><br></div><div><p>Present: Curtis, Naomi, Beni, Simon, Lubomir, Mark
</p>
<ol><li>FDC Update
<ol><li> The HV problem on one HV sector in package #3 was fixed. It was
caused by a sense wire tail sticking out of the solder. The cell was
installed back in the package and will be tested soon.
</li><li> The set-ups to test the cooling system are almost ready. One
set-up will be used to test for leakages (at 100psi) in the manifolds
installed on one of the packages. The other will test the temperatures
and flows in one loop using the Fluorinert chiller.
</li><li> The package #2 that was already tested at JLab was moved back
to Blue Crab. Beni: at lower flow rate (100ccpm instead of the nominal
250ccpm) some of the channels trip once per day, not clear why.
</li><li> According to Fernando there are 20 fADC125 that can be used
after Cody finishes the tests. Three will be shipped immediately to CMU
as soon as we have them (Beni). There are problems with the quality of
the boards which can delay the production by more than a month.
</li></ol>
</li><li>CDC Update
<ol><li> Naomi has started taking cosmics data with the CDC, looking at 3
boards at a time, with the aim of finding a signal on each straw. Gas
mix is 50/50 at 1100sccm and most of the boards went to 2100V, with very
little current drawn (few nA for 3 boards). Usually they start off at
10-20nA total and decrease to below 5nA. So far just one of the boards
tripped (at 80nA) and will be revisited. The picture shows signals from
mixed events in board B1 (straws in innermost stereo rows E,F,G).
</li><li> There was one bizarre incident where the pedestals on first
one and then all 3 boards dropped, and the ECL/PECL converter output pin
voltage went to zero, so the flash was not triggering correctly. This
pedestal drop was never seen with the prototype. Usually the pedestal
rises when the LV supplied to the HVB decreases.
</li><li> Pedestal width is 15-20 ADC units (mean is 16); channels without a straw have pedestal width 14-15 (4096 full scale ~ 0.5V).
</li><li> 2 channels in the fadc are not functioning perfectly (one has
low gain and huge offset, another does not have continuous range of
output values) but are usable.
</li></ol>
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