[Hbi-svt] [Hbi-internal] Error with DAQ code

Amrit Yegneswaran yeg at jlab.org
Thu Jun 16 18:13:19 EDT 2011


great job brian.
nice pulse train!
are voltage levels or widths or both adjustable?


On 6/16/2011 2:02 PM, Brian Eng wrote:
> Hi All,
>
> After talking with Jim Hoff (one of the FSSR2 designers from FNAL) I've discovered an error in our code (at least the C++ I haven't checked the LabVIEW yet). Specifically with the default command.
>
> Currently the function looks like (hopefully my mail client doesn't mangle it to badly) the following:
>
> void fssr2::register_default(int in_reg) {
>          command c;
>          c.set(6);
>          reg r = register_map[in_reg];
>          register_cmd(r, c);
>          register_map[in_reg].value = register_map[in_reg].def;
>
>          for (int i = 0; i<  prog_interface.size(); i++) {
>                  WDC_WriteAddr32(handle, PTA_CMC, 0x100, prog_interface[i].to_ulong());
>          }
>
>          bitset<16>  temp = prog_interface.back();
>          temp.set(bit_shift_control, 0);
>          WDC_WriteAddr32(handle, PTA_CMC, 0x100, temp.to_ulong());
>          temp.set(bit_bco_clock, 1);
>          WDC_WriteAddr32(handle, PTA_CMC, 0x100, temp.to_ulong());
>          temp.set(bit_bco_clock, 0);
>          WDC_WriteAddr32(handle, PTA_CMC, 0x100, temp.to_ulong());
> }
>
> What it should look like (similar to set/reset commands) is the following:
>
> void fssr2::register_default(int in_reg) {
>          command c;        c.set(6);
>          reg r = register_map[in_reg];
>          register_cmd(r, c);
>          register_map[in_reg].value = register_map[in_reg].def;
>
>          for (int i = 0; i<  prog_interface.size(); i++) {
>                  WDC_WriteAddr32(handle, PTA_CMC, 0x100, prog_interface[i].to_ulong());
>          }
>
>          bitset<16>  temp = prog_interface.back();
>          temp.set(bit_bco_clock, 1);
>          WDC_WriteAddr32(handle, PTA_CMC, 0x100, temp.to_ulong());
>          temp.set(bit_bco_clock, 0);
>          WDC_WriteAddr32(handle, PTA_CMC, 0x100, temp.to_ulong());
>          temp.set(bit_shift_control, 0);
>          WDC_WriteAddr32(handle, PTA_CMC, 0x100, temp.to_ulong());
> }
>
> Basically there should be an extra BCO cycle before shift_control goes low, not after.
>
> We were talking with Jim to figure out how to get the internal pulser to do more than a single pulse, which is what the default command does.
>
> So, for register 2: set = a single pulse out, default = 255 pulses, reset = stop the pulser.
>
> Here's what the pulser line after switching to the corrected default command sent to register 2 looks like.
>
> http://www.jlab.org/~beng/SVT/images/internal_pulser_255.png
>
> Let me know if you have any questions and feel free to forward this to anyone else that might need to change the code.
> _______________________________________________
> Hbi-internal mailing list
> Hbi-internal at jlab.org
> https://mailman.jlab.org/mailman/listinfo/hbi-internal

-------------- next part --------------
An HTML attachment was scrubbed...
URL: https://mailman.jlab.org/pipermail/hbi-svt/attachments/20110616/ae38f32f/attachment.html 


More information about the Hbi-svt mailing list