[Hps-controls] HPS controls meeting, Monday September 16, 2013

[Hovanes Egiyan]

Hi,

I posted brief minutes of the HPS Slow Controls meeting on Monday, 
September 16th at
https://confluence.slac.stanford.edu/display/hpsg/2013.09.16+Biweekly

Hovanes.


    Minutes

Present at JLab: F.-X., Nerses, Stepan, Hovanes

Present at SLAC: Ryan, Pele, Sho

Hovanes announced that he is trying to find a better time for the slow 
controls meetings for the fall semester. He setupa Doodle-poll to find 
the optimal time <http://www.doodle.com/z7s2xrgr2vbgs73w> for the group 
members.

Ryan described the basic concept of how the low voltages and the bias 
voltages for SVT will be controlled.

  * Bias voltages will be directly controlled from MPOD y a soft IOC
    running on a Linux server in the counting house.
  * The low voltages will be controlled both from both MPOD and an
    CA-server running within DAQ. The boards on MPOD will set a master
    voltage and will be controlled from the softIOC in the counting
    house, while within the SVT DAQ system the voltages will be
    multiplexed and can be controlled by changing values of CA channels
    served by the DAQ.
  * Sho or Pele will send an e-mail to the group within this week with a
    document or slides showing the exact number of channels and
    groupings so that it can be discussed at the next slow controls meeting.

Hovanes showed an Excel spreadsheet with IOCs that will be needed and 
their location for the HPS slow controls components described so far.

  * The IOC will be positioned at three locations: Pie Tower and the
    Space Frame in Hall B,  and the rack-room in the counting house.
  * Stepan pointed out that minitorus (Frascati) magnet power supply
    will stay on space frame so the only magnet power supply controlled
    from the pie-tower will be the pair spectrometer magnet power supply
    (main dipole).
  * Since almost all cables were removed, we will not gain much by
    trying to keep the classc8 IOC  on the Forward Carriage.
  * At the end we found that so far we need two VME crates on the space
    frame (classc1 and classc3), two VME crates on the pie tower
    (classc2 and classc8), and a Linux server in the counting house for
    softIOCs (clonioc1).
  * Stepan suggested that we need to talk to accelerator OPS to see if
    the beam-time accounting is going to be similar to 6-GeV accounting
    in order for us to keep the CLAS BTA setup.

Stepan said that there is a big progress with ECAL motherboard design.

  * ECAL voltage grouping will be available by the end of this week
  * DVCS CAEN HV mainframe will eventually need to move to the pie tower
    for ECAL. The beamline will need another CAEN chassis on the space
    frame. Hall B should have some for CLAS and CLAS12.
  * The rack with the DVCS CAEN HV will be moved to the EEL building
    where the ECAL is now such that it can be connected to the network
    and can be used for the software development.


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