<div dir="ltr"><br><br><div class="gmail_quote">---------- Forwarded message ----------<br>From: <b class="gmail_sendername">Chris Cuevas</b> <span dir="ltr"><<a href="mailto:cuevas@jlab.org">cuevas@jlab.org</a>></span><br>
Date: Mon, Feb 10, 2014 at 9:52 AM<br>Subject: D00000-16-08-S00X-VTP_Module-2.pdf<br>To: Alexandre Camsonne <<a href="mailto:camsonne@jlab.org">camsonne@jlab.org</a>><br><br><br>Hi Alexandre,<br>
<br>
Here is a draft copy of the Hall B Trigger Processor module. The details show that this module is closer to a GTP than the existing CTP design. The FPGA selection is slated to be a Virtex7 so we know it will have the needed resources to handle the demands for future experiments especially the complex cluster finding applications planned for CLAS12 and HPS.<br>
<br>
I have a preliminary cost estimate for this, but it is not ready to distribute.<br>
<br>
Regards,<br>
-Chris<br>
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