[Solid_ec] ec layout in simulation and simple wrapping study
Zhiwen Zhao
zwzhao at jlab.org
Tue Nov 24 17:10:24 EST 2015
Hi, All
I have implemented EC layout from ANL engineering into simulation and
did a very simple wrap material study
My results are here
http://hallaweb.jlab.org/12GeV/SoLID/download/ec/simulation/ec_wrap/
First, I notice one problem (refer to the 3 layout plots)
I think ANL has used to too small EC module for layout, like 5mm edge,
While we actually want 6.25mm edge module to make ~100cm2 per module.
They do leave space between module for current layout for wrapping
around modules.
but if we keep the layout and change module size from 5mm to 6.25mm, the
module starts overlap
This means the space is too small and the layout has to be redone.
And of course, this is for FAEC only, LAEC layout was never done.
Second, I looked at the energy resolution by shooting a 5GeV electrons
at 25 degree into FAEC of PVDIS
I tested with EC with no segmentation, segmentation with 2mm Mylar,Al,Pb
wrapping
The resulting total energy deposition is plotted and I don't see big
change of resolution for different setting.
(I have SoLID field on, but preshower lead shield off to make it simple)
I don't think this conclude anything, but it's a start.
And the simulation code can be used for more thorough testing.
ec related codes are here at SVN
https://jlabsvn.jlab.org/svnroot/solid/subsystem/ec/ where
********************************
layout has ANL layout and code
ec_solid_gemc is ec as a whole piece without segmentation
ec_solid_gemc_segmented is ec with ANL layout
analysis has the script to run and analysis results
********************************
to test and run the simulation, please use the JLAB_VERSION=1.2 software and
the temp gemc 2.2 I sent out earlier today.
And you have to use USE_GUI=2 for interactive mode.
somehow the common USE_GUI=1 mode use too much mem and I still try to
fix it.
Let me know any question
Zhiwen
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