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<p class="MsoNormal"><span style="font-size:12.0pt">Following discussions between the EJFAT developers and CODA teams, the consensus is to keep the FPGA firmware design minimal, focusing primarily on load balancing. At this stage of development, adding new
features to distinguish and handle different data ID types will be deferred. Consequently, the use of EJFAT LB within the streaming CODA system will not support inbound control events. Given this direction, we propose dedicating the upcoming EPSCI SRO meeting
to addressing how to define and manage streaming CODA control events without the support of EJFAT LB. Potential approaches to be discussed include handling these control events as constant metadata fields within the EVIO data structure or leveraging AFECS
to orchestrate and synchronize the delivery of control events to CODA components. These topics, along with other key design decisions for handling control events and the role of CODA run-control, will form the agenda for the EPSCI SRO meeting scheduled for
Monday, September 16th, at 2 PM. Please let me know if you require a formal invitation for your calendar. Additionally, I'm unsure if the ESnet team has access to Teams at JLAB. If there is interest from ESnet, I will arrange a Zoom meeting instead.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">-vardan</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
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<p class="MsoNormal"><span style="color:#212121;mso-ligatures:none">-------------------------------------------------<br>
Vardan H. Gyurjyan, Ph.D.<br>
Staff Scientist<br>
Thomas Jefferson Accelerator Facility<br>
Newport News, VA, 23606<br>
E-mail: </span><a href="mailto:gurjyan@jlab.org" target="_blank" title="mailto:gurjyan@jlab.org"><span style="color:#0078D7;mso-ligatures:none">gurjyan@jlab.org</span></a><span style="color:#212121;mso-ligatures:none"><br>
757-269-5879 (JLAB)</span><span style="mso-ligatures:none"> <o:p></o:p></span></p>
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