[Vetroc_daq_sbs] 792 readout, Thursday

Thu Oct 20 01:43:05 EDT 2016

Hi Evan, Bob,

just a few tweaks:

- I changed the cable from GTP to VETROC. Now is shorter. I checked that VETROC was working and I compared the channel 112 output (attached files). It changes the position of the LE/TE peaks in 100ns (not between them)
- I organized the folders a little bit. The decoded files are now in /home/adaq/decodefiles. I modified the scripts newrun and go_minimal to work according the new arrangement. There are soft links to such folder. 

- I guess this is obvious, but let me write it. Running the v792 alone needs to provide the trigger/gate differently as we do when we run VETROC. Originally, we provide the pulser trigger to channel 112, then VETROC passes the information to the GTP and that signal is feed to VETROC just for level conversion. THAT signal was the one we split to the TI and the gate (before v792alone mode). In v792alone mode, it looks like that GTP doesn't provide trigger signal. I think that it is NOT a problem, since we can just get the gate/trigger directly from the pulser (actually from the FI/FO module). 

- I agree we should take care with the level we provide to the gate input, but we should not forget that we need to be able to modify the width of such signal. I always used a discriminator for this purpose. I don't know if you have something different in mind.

Thanks

-Carlos

----- Original Message -----
From: "Evan McClellan" <randallm at jlab.org>
To: "Robert Michaels" <rom at jlab.org>
Cc: "Carlos Ayerbe Gayoso" <gayoso at jlab.org>
Sent: Wednesday, October 19, 2016 9:14:42 PM
Subject: Re: 792 readout, Thursday

Hey Bob,

I did eventually figure out the problem today. It was the polarity. I had the input cable plugged in backwards.

After fixing that issue, the ADC behaves as expected. I checked a few channels by sending a wide gate-signal, and verified that I got a large ADC value on the correct channel.

Carlos and I then continued to modify the simple decoder you had started. It now identifies the ADC flag, and saves a plot of the 16 ADC spectra (channels 0-15).

Carlos and I also plugged the VETROC and the GTP back in, and verified that both the v792alone and vetroc_block configurations still work. Finally, we modified the NIM circuitry so that both the pulser and the "one-shot" gate generator can be used to trigger the DAQ.

Next steps:
-We have not thoroughly verified that we see a sensible pulse-height spectrum. We simply checked that we saw pedestal values on empty channels, and a large-value spike on the channel which was fed the gate signal. I think a good next test would be to send gate signals of varying widths, and verify that the measured ADC values vary accordingly.

-It would be great to be able to run both the VETROC and v792 simultaneously, even though our needs to not strictly require it.

Unfortunately, I have two meetings tomorrow morning, so I will likely not come out to ESB until after lunch.

Thanks!
-Evan

----- Original Message -----
From: "Robert Michaels" <rom at jlab.org>
To: "R. Evan McClellan" <randallm at jlab.org>
Cc: "Carlos Ayerbe Gayoso" <gayoso at jlab.org>
Sent: Wednesday, October 19, 2016 1:31:30 PM
Subject: Re: 792 readout, Thursday

Yeah, that's odd.  It would be great if you could overcome that.  It might help to read the user manual about what restrictions or assumptions there are on the gate and the signal.  Like maybe the polarity ?  I admit I've never used this particular ADC, so a reading of the user manual could help.

See you tomorrow.

Bob

----- Original Message -----
From: "R. Evan McClellan" <randallm at jlab.org>
To: "Robert Michaels" <rom at jlab.org>
Cc: "Carlos Ayerbe Gayoso" <gayoso at jlab.org>
Sent: Wednesday, October 19, 2016 12:18:28 PM
Subject: Re: 792 readout, Thursday

Bob,

Thanks! I'll meet you there on Thursday.

I continued testing a bit yesterday and this morning. Everything seems to make sense to me, except that I can't get any signal to show up in the data. Each channel always looks like pedestal only, regardless of what I plug into the inputs.

I'll let you know if I make any progress today.

Thanks,
Evan

----- Original Message -----
From: "Robert Michaels" <rom at jlab.org>
To: "R. Evan McClellan" <randallm at jlab.org>
Cc: "Carlos Ayerbe Gayoso" <gayoso at jlab.org>
Sent: Wednesday, October 19, 2016 12:03:25 PM
Subject: re: 792 readout, Thursday

It looks like we had the CAEN 792 ADC starting to make sense
Monday.  I can come out to the setup Thursday (tomorrow) and
spend most of the day.  Start about 9:30.  The goals are to run 
the DAQ with only the ADC with some fake signals and generate
a pulse-height spectrum, and to repeat that on a few channels.
This will test the combination of ADC + DAQ + decoding software
for this module.  After that, we can plug the VETROC back
in and merge the ADC with the VETROC.  I had unplugged the
VETROC, SD, and GTP to avoid any interference, though now
I realize that was unecessary.  Please remember to turn
off VME power before re-inserting those; one can damage a
module if you leave power on while inserting or removing.
But I suggest we thoroughly test and understand the ADC
before anything else.  It takes a few hours.  If you manage
to do those tests before tomorrow, that's fine too.  We'll
take whatever the next step is on Thursday.

yours

Bob

-------------------------------------------------------
Robert W. Michaels, Staff Scientist
http://userweb.jlab.org/~rom    (757) 269 7410
Thomas Jefferson National Accelerator Facility
12000 Jefferson Ave, Newport News, VA 23606 USA

On Mon, 17 Oct 2016, R. Evan McClellan wrote:

>
> awesome!
>
> I'm about to head back over to ESB.
>
> -Evan
>
>
> ----- Original Message -----
> From: "R. Evan McClellan" <randallm at jlab.org>
> To: "Vetroc_daq_sbs" <vetroc_daq_sbs at jlab.org>
> Cc: "Robert Michaels" <rom at jlab.org>
> Sent: Monday, October 17, 2016 1:41:22 PM
> Subject: [Vetroc_daq_sbs] v792 User Manual
>
> Here is the user manual for the ADC
>
> -Evan
>
>
> R. Evan McClellan, PhD
> Hall A Postdoctoral Fellow
> Jefferson Lab
>
> _______________________________________________
> Vetroc_daq_sbs mailing list
> Vetroc_daq_sbs at jlab.org
> https://mailman.jlab.org/mailman/listinfo/vetroc_daq_sbs
>
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