[Vetroc_daq_sbs] maillist

Carlos Ayerbe gayoso at jlab.org
Tue Sep 27 11:22:48 EDT 2016


Hi guys, 

we finally have a mail list where we can exchange the info and keep a copy in a server. 

Right now, we are only Evan, Scott, Bashar and I. If you consider someone else should be included here, just invite them. 

To send mails here just use this address:

vetroc_daq_sbs at jlab.org



so, as first mail. 

I won't go to JLab this week. Mark Jones promise us to provide cables to connect the signal to the ADC. Since Rachal explain us that NINO analog output impedance is ~100ohm, we are ok with the cableing here but not at the ADC module. I think Mark cables can be used for the last stage of the signal cables (I don't know how are they, BNC, lemo, only flat). 

Also, there is the TI issue. Alex is aware (I mail him) but not answer. I'll write Bob to get more info. I'll put Evan in CC, in case I commit one of my common misinterpretation of the issue. 

Mark Jones is back this Wednesday, unless we get a better solution from Alex/Bob or even Brad, we have to wait for it. I really appreciate if Evan or Bashar can pick up the cables. Mark use to dissapear and this test is delayed too much. 

Out of this hardware mess, I think we should have a meeting about the event display-storing data issue. Nothing special, just a way to understand how to storage the date (I know, I know Scott... you don't want to knwo more of this, but this is a general topic that could be useful).

Thanks guys, and excuse me if the mail looks bossy, is far from my intentions.

Cheers

-Carlos


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