[Clas12_rich] Test of the mock electronics board

[Marco Mirazita]

Hi Valery,
thank you for the pictures.
There are a couple of things that should be checked.
The first thing is that all the electric connections are ok.
The second thing is to see how easy is to remove and put back one pmt 
from the panel.
We just guessed two possibilities, but we couldn't make tests because we 
don't have the pmt in Frascati.
One possibility is to remove the pmt from the front, but for this one 
should invent some special tool.
The second possibility is to remove a full tile, working from the 
ASIC/FPGA board side.
Marco


Il 2016-06-23 22:37 Valery Kubarovsky ha scritto:
> Hi All,
> 
> We tested the mock setup with tubes/adapters/ASICS/FPGA boards.
> Take a look to the pictures.
> https://userweb.jlab.org/~vpk/RICH12/2016_06_23_Photos_mirror_electronics/
> Everything fits good from the first view.
> Regards,
> Valery
> 
> PS. There are several pictures from the mirror test stand as well.
> _______________________________________________
> Clas12_rich mailing list
> Clas12_rich at jlab.org
> https://mailman.jlab.org/mailman/listinfo/clas12_rich