[Dsg-halla_magnets] I/O rack layout
Steven Lassiter
lassiter at jlab.org
Thu Apr 30 11:41:05 EDT 2020
Yes these changes will be needed but most of them are "paper" changes now and no drawings or HIM layouts are completed yet. No hardware or wiring has been done to date and now is the time to incorporate mods.
Changes are expected and evolution of the HMI screens never stops. One only has to wait until the experimenters have to use the screens and demand changes.
By using differential current mode for the LVDT eliminates the need for 10 dataforth signal conditioners and separates the strains gauges from the LVDTs so they are not tied to each other via the IF16 modules on the rst timing of the module. Allows for more flexibility in noise reduction and filtering options.
The HMS uses signal ended voltages for the LVDT and the SHMS uses different current mode. Both work well in that regard. LVDTs can become noisy due to hardware and other factors and this leads to excessive valve wear. So isolating all the LVDT and motor relays to one area may be better.
Other hardware may be added to the PLC controls as the project moves along, such as magnetic field devices for test lab use only.
Hope this doesn't cause too much grief.
Cheers
Steven
________________________________
From: Pablo Campero Rojas <campero at jlab.org>
Sent: Thursday, April 30, 2020 11:02 AM
To: Steven Lassiter <lassiter at jlab.org>; dsg-halla_magnets at jlab.org <dsg-halla_magnets at jlab.org>; Whit Seay <wseay at jlab.org>
Subject: Re: [Dsg-halla_magnets] I/O rack layout
Based on this new proposed disposition of the PLC layout, I can see the following changes involved:
* Channel assigned in the PLC code for the CCR JT valves, temperature sensors, vacuum, LL, and pressure transducers.
* Drawings: A00000-16-03-1150, A00000-16-03-0450 sheet 3,6,9 and 12
https://www.jlab.org/div_dept/physics_division/dsg/technical_documentation/Hall_A/SoLID/A00000-16-03-1150-1.pdf
https://www.jlab.org/div_dept/physics_division/dsg/technical_documentation/Hall_A/SoLID/A00000-16-03-0450-3.pdf
* Changing the LVDTs signal readout from "single ended mode" to "differential mode" (1756-IF16 adc module modes) involved the addition of one extra adc module, since only 8 channels from the total 16 can be used.
* Readout signals for heat exchanger's LVDTs were moved to a new ADC module.
So far this is what I noticed, and will need to be changed if we want to follow the proposed layout.
________________________________
From: Dsg-halla_magnets <dsg-halla_magnets-bounces at jlab.org> on behalf of Steven Lassiter <lassiter at jlab.org>
Sent: Thursday, April 30, 2020 10:02 AM
To: dsg-halla_magnets at jlab.org <dsg-halla_magnets at jlab.org>; Whit Seay <wseay at jlab.org>
Subject: [Dsg-halla_magnets] I/O rack layout
Hello All,
I propose the following changes to the CLEO-II I/O rack layout.
Lays out common components in a more logical order.
Steven
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