[Dsg-rich] Third cable and connector on RICH LV boards' service connector

Chris Cuevas cuevas at jlab.org
Wed Aug 9 12:14:38 EDT 2017


Hi,

If the 'hardware interlock system' produces an interlock relay closure, 
and this closure is
the logical OR of several signals, then the closure should be connected 
to the CAEN mainframe
interlock input(CPU).

Is this the case?

The interlock signals on the A2518 boards control two groups of 4 low 
voltage outputs.  Each output
channel has over-voltage and over-current trip points, and I do not see 
the need to interface to each
group of LV interlocks if there is a global interlock signal that will 
latch a disable condition.

-Chris
~~~~~~~~~~~~~~~



On 8/9/2017 9:48 AM, Marco Contalbrigo wrote:
> Hi Tyler,
> I did not catch your request. Are you speaking about the
> sense lines ? Anyway, I add Ben and Chris on the discussion
> and I will pass by your office later.
> Ciao, Marco.
>
> On Wed, 9 Aug 2017, Tyler Lemon wrote:
>
>> Hello Marco Contalbrigo and Valery,
>>
>> This morning we noted that the LV boards in EEL 124 cleanroom for 
>> RICH have a third cable
>> plugged into the LV board's service connector. What is this cable 
>> used for?
>>
>> To be able to interlock the LV boards with the hardware interlock 
>> system, these
>> connectors will need to be modified. The modifications would allow a 
>> relay to short the
>> required pins to enable/disable the LV board's output.
>>
>> Best regards,
>> Tyler
>>
>>





More information about the Dsg-rich mailing list