[Dsg-rich] EPICS softIOC needed for RICH Hardware Interlock System

[Tyler Lemon]

Hello Nathan and Wesley, 

As with the FT Hardware Interlock System, DSG has been developing another cRIO-based Hardware Interlock System for RICH to monitor RICH's internal temperature, humidity, and gas flow. The RICH Hardware Interlock System will turn of RICH's HV and LV if any parameter goes out of bounds. 

We are to the point in developing RICH's Hardware Interlock System where we will need a softIOC for it and to have its cs-studio GUI posted in the clascss screen under RICH. 

For RICH, the cRIO's IP address is currently 129.57.86.45. 

Attached is the cs-studio interface we've developed for the RICH. If there are any changes that need to be made to this screen to allow it to be integrated into clascss, please let us know. 

Also attached is an Excel sheet containing a list of PVs RICH's Hardware Interlock System will use. The list contains the initial LabVIEW variable name and then the renamed PV that follows Hall B's naming convention. 

Once testing of the RICH begins, we will determine what signals need to be logged and what the signals' deadbands should be. 

If there is any other information required to set up the softIOC, please let us know. 

Best regards, 
Tyler 

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