[Dsg-rich] FPGA temp alarm

Valery Kubarovsky vpk at jlab.org
Tue Oct 16 07:55:09 EDT 2018


Marco, 
If you take a more careful look you will find out that the LV was shut down. 
The HV was off. We investigate the reason. It is the first time we had such an event. 
Probably it was connected with the software update that was done approximately at the same time. 
Regards, 
Valery 

> From: "Marco Mirazita" <Marco.Mirazita at lnf.infn.it>
> To: dsg-rich at jlab.org, rich at jlab.org
> Sent: Tuesday, October 16, 2018 4:03:24 AM
> Subject: [Dsg-rich] FPGA temp alarm

> Hi all,
> yesterday at about 4:20 pm jlab time I received several alarm messages
> saying that the FPGA temperatures reached values around 115 deg.
> Since it looked like a readout error, I checked the strip chart, where
> there is actually a spike in the readout at that time, but to values of
> the order of -10^5. See the attached plot.
> So, it is clear that it was a readout error, but it is strange that the
> alarm message and epics report different values.
> Also, according to the logbook, the electronics was not shut down by the
> interlocks, as should have happened if the temperature really went above
> 100 deg.
> So, perhaps the values reported in the alarm messages are not the
> correct ones?
> Marco

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