[Dsg-rich] [EXTERNAL] meeting with DSG

Brian Eng beng at jlab.org
Mon Oct 14 10:17:09 EDT 2019


Hi Marco,

Regarding the FPGA temperatures, since we don't have the FPGA code itself we can only make an educated guess, but it's quite  likely that it is using the on-die temperature sensor.

https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf
(page 14, figure 1-1)

Note that this sensor has an error of +/- 4C when the temp is < 100C

> On Oct 14, 2019, at 3:35 AM, mirazita at jlab.org wrote:
> 
>  
> marco mirazita has invited you to a meeting. 





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