[dsg-svt] SVT outinhibit

[Peter Bonneau]

We had another trip of the SVT on 10/15/2017 at 20:27.

Analysis of the trip for the Hardware Interlock System showed that low 
coolant flow was detected followed by the shutdown of all low and high 
voltage. This is the correct response for the interlock system. The 
interlock system can not stop coolant flow.

As shown in the attached EPICS Mya archive chart, a slow rise in coolant 
temperature occurred after the trip.


Peter


------------------------------------------------------------------------
*From: *"Peter Bonneau" <bonneau at jlab.org>
*To: *"Yuri Gotra" <gotra at jlab.org>, dsg-svt at jlab.org
*Sent: *Friday, October 13, 2017 7:38:36 AM
*Subject: *Re: SVT outinhibit

Yuri:

I checked on the hardware interlock system system this morning and it's
running normally (no trips overnight).

After a system trip and before resetting, we need screen captures of the
"Interlock Status and signal monitoring" and the "Raw data monitoring"
tabs of the Hardware Interlock Monitoring System user interface for
troubleshooting. We need to know which signal is causing the tripping.

The last time we had an issue like this (1/31/2017) ,  the problem was
caused by a loose connection to the  external coolant system monitoring
electronics  (Proteus Industries sensor and Florite 990x Controller.)

As mentioned back in January, we don't have spares for the external
coolant monitoring electronics. I recommend we purchase spares for this
system.

Peter

On 10/12/2017 8:31 PM, Yuri Gotra wrote:
 > Dear Peter,
 >
 > We had another crate inhibit issue this evening. Software interlocks
 > were ok, chiller running.
 >
 > HV inhibit was red and all HV channel inhibits had errors. HV and LV
 > ramped down.
 >
 > On the screenshot you could see B_SVT_HV_R1:outinhibit major
 > HIHI_alarm at 20:06.
 >
 > Please let us know your suggestions on debugging this issue. Thank you
 >
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