[dsg-svt] SVT outinhibit
Yuri Gotra
gotra at jlab.org
Mon Oct 16 14:05:14 EDT 2017
Thank you Peter,
I still see the same picture as it was last week, see the attached
picture: HV R1:outinhibit was first (20:04), then fast powering off HV
and LV, then (because the heat source, LV, was removed) temperature
gradually decreased till (as designed) the ambient temperature soft
interlock stopped the chiller (20:27).
The question is why R1 HV outinhibit was issued. Please let me know your
suggestions on further debugging. Thank you
On 10/16/17 11:21 AM, Peter Bonneau wrote:
> We had another trip of the SVT on 10/15/2017 at 20:27.
>
> Analysis of the trip for the Hardware Interlock System showed that low
> coolant flow was detected followed by the shutdown of all low and high
> voltage. This is the correct response for the interlock system. The
> interlock system can not stop coolant flow.
>
> As shown in the attached EPICS Mya archive chart, a slow rise in
> coolant temperature occurred after the trip.
>
>
> Peter
>
>
> ------------------------------------------------------------------------
> *From: *"Peter Bonneau" <bonneau at jlab.org>
> *To: *"Yuri Gotra" <gotra at jlab.org>, dsg-svt at jlab.org
> *Sent: *Friday, October 13, 2017 7:38:36 AM
> *Subject: *Re: SVT outinhibit
>
> Yuri:
>
> I checked on the hardware interlock system system this morning and it's
> running normally (no trips overnight).
>
> After a system trip and before resetting, we need screen captures of the
> "Interlock Status and signal monitoring" and the "Raw data monitoring"
> tabs of the Hardware Interlock Monitoring System user interface for
> troubleshooting. We need to know which signal is causing the tripping.
>
> The last time we had an issue like this (1/31/2017) , the problem was
> caused by a loose connection to the external coolant system monitoring
> electronics (Proteus Industries sensor and Florite 990x Controller.)
>
> As mentioned back in January, we don't have spares for the external
> coolant monitoring electronics. I recommend we purchase spares for this
> system.
>
> Peter
>
> On 10/12/2017 8:31 PM, Yuri Gotra wrote:
> > Dear Peter,
> >
> > We had another crate inhibit issue this evening. Software interlocks
> > were ok, chiller running.
> >
> > HV inhibit was red and all HV channel inhibits had errors. HV and LV
> > ramped down.
> >
> > On the screenshot you could see B_SVT_HV_R1:outinhibit major
> > HIHI_alarm at 20:06.
> >
> > Please let us know your suggestions on debugging this issue. Thank you
> >
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://mailman.jlab.org/pipermail/dsg-hallb_svt/attachments/20171016/af9b79e1/attachment-0002.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: SVT_crate_inhibit_incident.png
Type: image/png
Size: 325222 bytes
Desc: not available
URL: <https://mailman.jlab.org/pipermail/dsg-hallb_svt/attachments/20171016/af9b79e1/attachment-0002.png>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: gotra.vcf
Type: text/x-vcard
Size: 102 bytes
Desc: not available
URL: <https://mailman.jlab.org/pipermail/dsg-hallb_svt/attachments/20171016/af9b79e1/attachment-0002.vcf>
More information about the dsg-svt
mailing list