[dsg-svt] Fwd: SVT Cooling System Trip Analysis (Hardware Interlock)

Yuri Gotra gotra at jlab.org
Fri Aug 10 08:51:22 EDT 2018


Thank you Peter,

Today's trip is caused by the circuit breaker. Around 4 am I started 
warming up the tracker to prepare for the target alignment work. The 
chiller and the external pump are on the same 20 A breaker (connected 
via the relay). The chiller draws 15 A and the pump 3 A. When heater is 
operational there could be current jumps over 20 A. Bob requested 
separation of the pump and the chiller power which requires extra relay 
box. Could you please provide another relay box with additional control 
line from the hardware interlock box connected to the interlock system 
the same way as for the existing relay box. I believe splitting the same 
control line would do. Thank you


On 8/10/18 7:51 AM, Peter Bonneau wrote:
>
> Attached is 2 myaPlot charts of the trip today at 4:33.
>
> Sequence of events as seen by the hardware interlock system:
>
> 1) 4:26:25 - Cooling temperature starts rising.
> 2) 4:32:59 - Cooling pressure starts dropping.
> 3) 4:33:00 - Cooling in-flow starts dropping.
> 4) 4:33:06 - Cooling in flow drops to .5L/m - Interlock limit=.5, cool 
> in-flow status = 1 (Fault).
> 5) 4:33:08 - After the 2 sec delay (current delay setting) - Cooling 
> in-flow latched error.
>
> Hardware interlock operated correctly during this event.
>
> In this trip, cooling temperature started rising first, otherwise the 
> sequence is the same.

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