[Hallb-solenoid] Interlock Checkout List P027 Completed

[Ruben Fair]

Thank you very much Pablo and Tyler. 

Your help was invaluable in getting us through this phase. 

We shall work through your list below. 

Regards 

Ruben 


From: "Pablo Campero Rojas" <campero at jlab.org> 
To: "Ruben Fair" <rfair at jlab.org> 
Cc: hallb-solenoid at jlab.org 
Sent: Friday, October 7, 2016 1:44:21 PM 
Subject: Interlock Checkout List P027 Completed 

Dear Ruben, 

Tyler and I completed all tasks Hall B Pre-Power-Up Interlock Checkout Procedure- P027. 

We noted failures in the following tasks: 

1. "Verify interlock to prevent over current" 
- EPICS would not allows any current set point to be entered, regardless of whether current limit is exceeded. 

2. "Comparator 4 1st Threshold" 
- Because of noise, interlock tripped continuously with a 1st threshold limit of 150 [mV]. 
- VT10-DAQ (used for comparator 4) had about 50 [mV] noise with voltage source connected, and 75 [mV] without voltage source connected. 
3. "Comparator 4 2nd Threshold" 
- Because of noise, interlock tripped when the difference between voltage sources was 28 [mV] (It should be about 200 [mV]). 

4. "Comparator 6 1st Threshold" 
- Because of noise, interlock tripped continuously with a 1st threshold limit of 150 [mV]. 
- VT6-DAQ (used for comparator 6) had about 50 [mV] noise with voltage source connected. 
5. "Comparator 6 2nd Threshold" 
- Because of noise, interlock tripped continuously with a 2nd threshold limit of 200 [mV]. 

6. "Test Danfysik QD Sum1", " Test Danfysik QD Sum2" and " Test Danfysik QD Sum 3" 
- MPS can not be reset from EPICS. 
- Had to reset from local MPS control panel . 

Best Regards 
Pablo Campero 

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://mailman.jlab.org/pipermail/hallb-solenoid/attachments/20161007/11cdb169/attachment-0001.html>