[Halld-controls] PXI Time Stamps

[Timothy Whitlatch]

Good Afternoon, 

I ran the magnet up to 10A. It seems the PLC current leads the PXI current on the archiver (see attached) 

Tim Whitlatch 
Hall D Engineer 
Jefferson Lab 
600 KELVIN DR STE 5 
Newport News, VA 23606-4468 
757-269-5087 


From: "Brian Eng" <beng at jlab.org> 
To: "Hovanes Egiyan" <hovanes.egiyan at gmail.com> 
Cc: halld-controls at jlab.org 
Sent: Thursday, September 6, 2018 12:18:51 PM 
Subject: Re: [Halld-controls] PXI Time Stamps 

I tried disabling/enabling the setting I thought might correct the offset on the PXI; which naturally had no effect (at least on the PXI controller time properties, still showing 34 sec faster). 

I've filed a support ticket with NI to see if there's some other way to do something about this offset. 

Currently it is in the opposite setting it was previously, so maybe it's good on the EPICS side now? 
If someone wanted to put a small amount of current in the magnet to compare the PVs with the PXI data we'd know for sure. 

----- Original Message ----- 
> From: "Hovanes Egiyan" <hovanes.egiyan at gmail.com> 
> To: "Brian Eng" <beng at jlab.org> 
> Cc: halld-controls at jlab.org 
> Sent: Tuesday, September 4, 2018 10:42:27 AM 
> Subject: Re: [Halld-controls] PXI Time Stamps 

> The timestamps in the ROOT files should be from PXI, the IOC is supposed 
> to keep that timestamp. 
> 
> I do not know exactly how PXI decides what time to put on the 10K long 
> array. 
> 
> Hovanes. 
> 
> 
> 
> On 09/04/2018 10:22 AM, Brian Eng wrote: 
>> No, since we don't really care about the UTC <-> TIA offset it would just be 
>> updating the PXI to (hopefully) undo that offset that the PLC uses. So far 
>> Rockwell has said it is hard-coded and we can't modify it. 
>> 
>> However, the PVs seem backwards to me (PXI is ~30 sec slower than the PLC, when 
>> it should be faster). See attached screenshots. 
>> 
>> Are there any timestamps from the SOE on the last dump? On the FastDAQ ROOT 
>> program, where are the timestamps coming from? The IOC or the PXI? If it comes 
>> from the IOC then we don't need to do anything with the PXI. 
>> 
>> I have no plans on doing anything with the PLC unless/until they have a firmware 
>> we can set that offset to 0. 
>> 
>> ----- Original Message ----- 
>>> From: "Hovanes Egiyan" <hovanes.egiyan at gmail.com> 
>>> To: halld-controls at jlab.org 
>>> Sent: Tuesday, September 4, 2018 9:47:23 AM 
>>> Subject: Re: [Halld-controls] PXI Time Stamps 
>>> Brian, are you going to change the firmware on a PLC module? I did not quite 
>>> 
>>> 
>>> understand what is going to be upgraded and rebooted. 
>>> 
>>> 
>>> Hovanes. 
>>> 
>>> On 09/04/2018 09:42 AM, Beni Zihlmann wrote: 
>>> 
>>> 
>>> I think yes we should do this. 
>>> 
>>> On 09/04/2018 09:36 AM, Timothy Whitlatch wrote: 
>>> 
>>> 
>>> 
>>> Hi Brian, 
>>> 
>>> We will have time this week to reboot the PXI (Just not today). 
>>> 
>>> Hovanes and Beni, do you think we should implement the fix this week? 
>>> 
>>> 
>>> Tim Whitlatch 
>>> Hall D Engineer 
>>> Jefferson Lab 
>>> 600 KELVIN DR STE 5 
>>> Newport News, VA 23606-4468 
>>> 757-269-5087 
>>> 
>>> 
>>> From: "Brian Eng" <beng at jlab.org> 
>>> To: "Hall D Controls" <halld-controls at jlab.org> 
>>> Sent: Thursday, August 30, 2018 1:46:47 PM 
>>> Subject: [Halld-controls] PXI Time Stamps 
>>> 
>>> We recently discovered that the time used by the PLCs has a offset to it which 
>>> causes them to use/provide an incorrect time. 
>>> 
>>> It manifests itself in 2 ways: 
>>> 1) If the CC server is the master the PLC will be 34 seconds fast 
>>> 2) if the PLC is the master any devices on the same subnet will be 34 seconds 
>>> fast 
>>> 
>>> That 34 seconds is hard-coded in the PLC ethernet module and only changed by 
>>> upgrading the firmware (but it still won't be user adjustable). It comes from 
>>> the offset between UTC & TAI time when the module was purchased. 
>>> 
>>> Currently we're operating in the second configuration. 
>>> 
>>> There is an option to correct this offset with Linux based NI devices, but I 
>>> haven't yet tested it with the other OSes (namely the PXI which uses Phar Lap). 
>>> 
>>> Unfortunately even if I can remove this offset it will require rebooting the 
>>> PXI, so my question is should I try pursuing fixing this or is knowing that 
>>> there is a fixed & constant offset good enough for now? 
>>> 
>>> 
>>> 
>>> 
>>> P.S. This isn't like the earlier time problems we had where the time would 
>>> slowly wander off, this is a fixed value with only the error of PTP coming into 
> >> play which should be at the sub-ms level.ls 
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