[Halld-pid] Question on FADC250 clipping

[Elton Smith]

Hi Sasha,

Just a note to note that the ADC max is 4095 (the 8192 is the overflow 
bit), so a pedestal at 2000 is actually half the dynamic range. We will 
need to adjust pedestal values to a small number in order to preserve 
the dynamic range.

Cheers, Elton.

Elton Smith
Jefferson Lab MS 12H5
12000 Jefferson Ave STE 16
Newport News, VA 23606
(757) 269-7625
(757) 269-6331 fax

On 6/24/13 2:54 PM, Beni Zihlmann wrote:
> Hi Sasha,
> for each channel there is a jumper that can be set to 0.5 1.0 and 2.0 Volts.
> it is very obvious. The jumper is right next to the input on the PCB.
>
> cheers,
> Beni
>
>
>> Hi Fernando,
>>
>> In our tests of TOF modules, we have switched now to FADC250
>> which you sent to us. Things are mostly looking good, we see
>> signal shapes and all ADC controls are working as expected.
>> However, we see a lot of signal clipping at 8192 (2^13) ceiling.
>> On the scope, the triggered signals are on the order of a few
>> hundred mV, with an average of 600 mV. However, more
>> than 90% of the ADC shapes are clipped on top. As far as
>> I understand, the ADC max is selectable with some
>> resistor block to be 0.5V, 1V or 2V. How do I check that
>> it is not set to 0.5V in our FADC? Is there any way to check
>> this through VME, or do I have to measure those resistors?
>> Also, are the pedestals of ~2000 counts (1/4 of the FADC range)
>> normal and expected for signals without any visible DC offset?
>>
>> Sasha
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