[Vetroc_daq_sbs] Summary

[Carlos Ayerbe]

Hi all, 

just to recap the last days.

-The ADC v792 is working properly, we already took pedestals runs and 4 set of data for calibration (4 voltages). It was done with the UV LED we use for background, so we illuminate all PMTs "evenly".

-We found that one HV line trips off when we reach 1400V. Not big deal because this value is exceptional, only for the calibration, but good to know.

-I'm analyzing the data and I hope to have the results this Friday. I can advance that I found one channel that probably was connected to the wrong HV line since the ADC spectra shows very low gain. I'll check this issue with the Fastbus notes. 

-Evan has been working in a Time over Threshold (ToT) analysis and testing it, he found a possible readout issue in VETROC. He found that the ToT signal is negative in the channels of a single VETROC input (as I understood, if trailing edge (TE) comes after leading edge (LE), the ToT will be positive. But with the change of polarity, the papers of LE and TE change and ToT is negative. This is what he found, don't you Evan?). We swap two NINO cards to see if it comes from a NINO card or is something internal in VETROC. The data shows that this issue persists in the same channels. We suspect that it comes from the direct VETROC inputs, but not from the piggyback inputs. 

We think we will need a meeting with Ben (unless Scott knows how to check it). Also, long time ago, we found that one of the input (different one, but related to same input) read the NINO channels inverted (1->16, 2->15, 3->14 and so on). Scott mentioned that it could be fixed by modifying the firmware. We should check. 

Thanks 

-Carlos