[Dsg-hallb_magnets] Questions regarding digital filter for Hall B Magnet Fast-Daq

[Tyler Lemon]

Hello Ruben and Renuka, 

I have been investigating how to add digital filters to the Fast-Daq programs and have the following questions: 


    1. Are there noise issues on all voltage taps or just the ones that are being scaled? 
    2. Why are some voltage taps scaled while others are not? 
    3. Is there documentation for the iso-amps' grounding scheme? 
        1. Looking at Solenoid drawing B00000-09-0683 for how the voltage taps are wired to the iso-amp and then to the cRIO, there is no indication that the iso-amps are grounded. 
    4. How fast should the interlock trip after a voltage spike? 
    5. Is there logged data of the voltage tap noise? 
        1. For the filter, it would help to know if the noise is of a constant frequency or just white noise. 

In regards to applying and testing a filter in LabVIEW, there is a version of the Fast-Daq cRIO FPGA code almost ready for testing with lowpass filters applied to only the channels that are scaled. However, before testing this code, it would be good to have the above questions answered. 

Best regards, 
Tyler 

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