[Dsg-rich] RICH HV/LV board interlock testing

[Tyler Lemon]

Hello Valery, 

We need to test the interlock enable ability of RICH HV and LV boards to be able to fully complete the cRIO-based hardware interlock system. 

Marco Contalbrigo mentioned that the power supplies would be moved soon to start installing the electronics on the electronic panel. 

Could we install all HV and LV boards in the power supply mainframe to be able to test the interlock enable functions? 

Best regards, 
Tyler 

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