[dsg-hallb_rich] RICH hardware interlocks - S4 CAEN HV/LV status indicators corrected

[Valery Kubarovsky]

Thank you Tyler,
Valery
________________________________
From: dsg-hallb_rich <dsg-hallb_rich-bounces at jlab.org> on behalf of Tyler Lemon via dsg-hallb_rich <dsg-hallb_rich at jlab.org>
Sent: Tuesday, August 8, 2023 09:23
To: dsg-hallb_rich at jlab.org <dsg-hallb_rich at jlab.org>
Subject: [dsg-hallb_rich] RICH hardware interlocks - S4 CAEN HV/LV status indicators corrected

Hi Valery,

Thanks for letting me know the RICH S4 CAEN power supply statuses on the hardware interlock summary screen was not reflecting the actual status of the system.

The problem has been corrected and the update pulled in to "clascss". A screenshot is attached with the indicators whose logic has been updated circled in pink.

The cause of the incorrect S4 CAEN status was the indicators used Boolean OR logic to combine the statuses from the S4 N2 volume cRIO and the S4 EP cRIO when it should have used Boolean AND logic.

-Tyler
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